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Assessing Quantum Annealing to Solve the Minimum Vertex Multicut

Ali Abbassi, Yann Dujardin, Eric Gourdin, Philippe Lacomme, Caroline Prodhon

TL;DR

The paper addresses solving the Restricted Vertex Minimum Multicut (RVMMC) in telecommunications networks using quantum annealing. It formulates RVMMC as a path-based QUBO and tests the approach on D-Wave hardware, with emphasis on embedding complexity, chain stability, and hybrid quantum-classical solvers. Key findings show that hardware embedding constraints and chain instability hinder pure quantum runs, while hybrid quantum-classical workflows and careful parameter tuning offer practical feasibility for mid-sized instances. The study provides a realistic assessment of current D-Wave capabilities and offers guidance for hardware-aware formulations in cybersecurity network optimization.

Abstract

Cybersecurity in telecommunication networks often leads to hard combinatorial optimization problems that are challenging to solve with classical methods. This work investigates the practical feasibility of using quantum annealing to address the Restricted Vertex Minimum Multicut Problem. The problem is formulated as a Quadratic Unconstrained Binary Optimization model and implemented on D-Wave s quantum annealer. Rather than focusing on solution quality alone, we analyze key aspects of the quantum workflow including minor embedding techniques, chain length, topology constraints, chain strength selection, unembedding procedures, and postprocessing. Our results show that quantum annealing faces substantial hardware-level constraints limitations in embedding and scalability, especially for large instances, while hybrid quantum-classical solvers provide improved feasibility. This study offers a realistic assessment of the D-Wave system s current capabilities and identifies crucial parameters that govern the success of quantum optimization in cybersecurity-related network problems.

Assessing Quantum Annealing to Solve the Minimum Vertex Multicut

TL;DR

The paper addresses solving the Restricted Vertex Minimum Multicut (RVMMC) in telecommunications networks using quantum annealing. It formulates RVMMC as a path-based QUBO and tests the approach on D-Wave hardware, with emphasis on embedding complexity, chain stability, and hybrid quantum-classical solvers. Key findings show that hardware embedding constraints and chain instability hinder pure quantum runs, while hybrid quantum-classical workflows and careful parameter tuning offer practical feasibility for mid-sized instances. The study provides a realistic assessment of current D-Wave capabilities and offers guidance for hardware-aware formulations in cybersecurity network optimization.

Abstract

Cybersecurity in telecommunication networks often leads to hard combinatorial optimization problems that are challenging to solve with classical methods. This work investigates the practical feasibility of using quantum annealing to address the Restricted Vertex Minimum Multicut Problem. The problem is formulated as a Quadratic Unconstrained Binary Optimization model and implemented on D-Wave s quantum annealer. Rather than focusing on solution quality alone, we analyze key aspects of the quantum workflow including minor embedding techniques, chain length, topology constraints, chain strength selection, unembedding procedures, and postprocessing. Our results show that quantum annealing faces substantial hardware-level constraints limitations in embedding and scalability, especially for large instances, while hybrid quantum-classical solvers provide improved feasibility. This study offers a realistic assessment of the D-Wave system s current capabilities and identifies crucial parameters that govern the success of quantum optimization in cybersecurity-related network problems.
Paper Structure (13 sections, 9 equations, 4 figures, 2 tables)

This paper contains 13 sections, 9 equations, 4 figures, 2 tables.

Figures (4)

  • Figure 1: Left: Solver energy comparison (absolute value log scale) across instances. Right: Associated cutset sizes indicating solution feasibility.
  • Figure 2: Source-to-QPU mapping and chain structure using D-wave inspector tool for a small instance.
  • Figure 3: Embedding overhead: non-linear scaling from logical to physical qubits in D-Wave quantum annealing.
  • Figure 4: Solver runtime comparison and QPU timing breakdown across instances.