Probabilistic Computers for Neural Quantum States

TL;DR

This work tackles the sampling bottleneck in variational simulations of quantum many-body systems by deploying a probabilistic computer built from p-bits on FPGAs to accelerate energy-based neural quantum states. It achieves large-scale results on the 2D transverse-field Ising model by mapping a sparse Further Restricted Boltzmann Machine to hardware and using multi-FPGA clusters to reach 6400 spins with chemical-accuracy energies, significantly surpassing CPU-based capabilities. It further introduces dual sampling to train deep Boltzmann machines, enabling efficient training and improved parameter efficiency over shallow networks, demonstrated on up to 35×35 lattices on GPUs. Collectively, these advances show that probabilistic hardware can remove the sampling bottleneck and enable scalable, deeper variational representations of quantum matter, with potential for integrated, low-latency quantum-classical simulation on specialized hardware.

Abstract

Neural quantum states efficiently represent many-body wavefunctions with neural networks, but the cost of Monte Carlo sampling limits their scaling to large system sizes. Here we address this challenge by combining sparse Boltzmann machine architectures with probabilistic computing hardware. We implement a probabilistic computer on field programmable gate arrays (FPGAs) and use it as a fast sampler for energy-based neural quantum states. For the two-dimensional transverse-field Ising model at criticality, we obtain accurate ground-state energies for lattices up to 80 $\times$ 80 (6400 spins) using a custom multi-FPGA cluster. Furthermore, we introduce a dual-sampling algorithm to train deep Boltzmann machines, replacing intractable marginalization with conditional sampling over auxiliary layers. This enables the training of sparse deep models and improves parameter efficiency relative to shallow networks. Using this algorithm, we train deep Boltzmann machines for a system with 35 $\times$ 35 (1225 spins). Together, these results demonstrate that probabilistic hardware can overcome the sampling bottleneck in variational simulation of quantum many-body systems, opening a path to larger system sizes and deeper variational architectures.

Figures (7)

• Figure 1: Probabilistic computers for accelerating variational simulations of quantum systems. (a) Conventional approaches such as path-integral quantum Monte Carlo (QMC) map quantum systems to classical statistical models in higher dimensions via the Suzuki-Trotter decomposition, but often suffer from sign problems or unfavorable scaling. (b) Neural Quantum States (NQS) represent the many-body wavefunction with neural networks ansätze. While many NQS architectures rely on dense or structured networks, sparse locally connected models are particularly well suited for mapping onto probabilistic hardware used in this work. Ground states are obtained through variational optimization of the quantum energy, which requires repeated Monte Carlo sampling from the neural network model. (c) Sampling is offloaded to a dedicated probabilistic processor built from p-bits. A general-purpose processor updates variational parameters while a p-bit array provides high-throughput samples. Throughput increases as implementations progress from CPU emulation to FPGA-based systems and, ultimately, to dedicated CMOS hardware.
• Figure 2: Single-FPGA results for the 2D transverse-field Ising model. (a) Problem and hybrid setup: a 2D square lattice with periodic boundaries, simulated using a CPU-FPGA platform where the FPGA samples from a Further Restricted Boltzmann Machine (FRBM) with local connectivity ($k=2$, corresponding to 13 neighbors). (b) Training convergence for a $35\times35$ lattice (1225 spins) at the critical field $\Gamma_c/J = 3.044$. The energy per spin reaches chemical accuracy (blue shaded band: relative error $|\Delta E/E_{\rm ref}| \leq 1.6\times 10^{-3}$, $E_{\rm ref}$ is a variational Projected Entangled Pair States (PEPS) benchmark estimate at the thermodynamic limit ($L\to \infty$) from Ref. fedorovich2025finite) within $\approx$100 iterations. (c) Ground-state energy per spin versus transverse field, interpolating between the ferromagnetic limit ($E/N \to -2$ as $\Gamma_x \to 0$) and the field polarised limit ($E/N \to -\Gamma_x$ as $\Gamma_x \to \infty$). For validation, we also compare against Continuous-Time Path Integral Monte Carlo simulation ($\beta=64$ and $10^5$ Monte Carlo sweeps) using the code provided in king2021scaling. FRBM results are obtained from an average over $10^6$ samples of a single run after the training is completed. Error bars represent standard error via blocking (50 bins) and are smaller than the symbol size.
• Figure 3: Multi-FPGA results for large-scale neural quantum states. (a) Six-FPGA probabilistic computer with boards connected via 3 Gbps FMC links and coordinated over Ethernet; each FPGA hosts up to 2200 p-bits. (b) Training convergence for a $50 \times 50$ lattice (2500 spins) at the critical field $\Gamma_c/J=3.044$. (c) Same for an $80 \times 80$ lattice (6400 spins), showing empirically that convergence within chemical accuracy (blue shaded region) is maintained as system size increases. PEPS benchmark estimate at the thermodynamic limit is taken from Ref. fedorovich2025finite.
• Figure 4: Deep Boltzmann machine results for the 2D transverse-field Ising model. (a) Convergence of the sparse DBM using dual sampling on a $10 \times 10$ lattice ($J = 1$, $\Gamma_c = 3.044$). Supplementary Section \ref{['supp_sec:hyperparamters']} provides the hyperparameter choices. The variational energy converges toward a variational PEPS benchmark from Ref. fedorovich2025finite. A transient non-monotonic deviation appears early in training, consistent with the adaptive regularization dynamics of the SR solver during the high-learning-rate phase. (b) Final converged energy versus number of variational parameters $N_p$ for the sparse DBM (green squares) and sparse RBM (blue circles). Parameter count is varied by adjusting the connectivity radius $k$ (see Supplementary Section \ref{['supp_sec:parameter_counting']}). The most compact DBM ($N_p \approx 1300$) achieves lower energies than RBMs with more than twice as many parameters. (c) Final energy across 5 independent training runs with random initializations. The DBM consistently converges to lower energies than the RBM. Error bars in (b) and (c) represent standard error via blocking (50 bins); the y-axis shows residual energy scaled by $10^3$ relative to the offset $-3.2355$.
• Figure 5: Scalable training of Deep Boltzmann Machines (DBMs) on GPU. (a) Training convergence for a $35 \times 35$ lattice at the critical point $\Gamma_c/J \approx 3.044$. We train a sparse DBM with local connectivity radius $k=2$ on both layers (13 connections per spin), resulting in $N_p = 35,525$ variational parameters. The variational energy (red line) converges to within chemical accuracy (blue shaded region) of a variational PEPS benchmark estimate at the thermodynamic limit ($L\to \infty$) from Ref. fedorovich2025finite. (b) Ground-state energy density across the transverse-field phase transition for a $35 \times 35$ lattice, comparing the sparse DBM (red circles) against CT-PIMC (green squares, same as in Fig. \ref{['fig:fig2']}). The DBM captures the phase transition with high precision. (c) Empirical algorithmic scaling of the dual-sampling estimator on a single NVIDIA V100 GPU. The average wall-clock time per optimization iteration (red circles, averaged over 500 iterations; error bars indicate 95% confidence intervals) is shown as a function of the linear lattice dimension $L$. To strictly isolate algorithmic scaling from hardware parallelization effects, we use a single sequential MCMC chain rather than parallel independent chains. Under fixed sparsity and sampling budgets ($N_s, N_c$), the iteration time scales approximately as $t_{\mathrm{iter}} \propto L^2$ (dashed quadratic fit), corresponding to linear dependence on the total number of spins $N=L^2$. This behavior is consistent with the simplified cost model for conventional processors in Supplementary Section G.