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Fancy Some Chips for Your TeaStore? Modeling the Control of an Adaptable Discrete System

Anna Gallone, Simon Bliudze, Sophie Cerf, Olga Kouchnarenko

TL;DR

This work presents Chips, a language for designing adaptable distributed systems that blends control theory and aggregate programming with a synchronous dataflow style, enabling automated generation of BIP models. Using an Adaptable TeaStore as a running example, the authors demonstrate a complete workflow: requirements analysis, Chips model construction, controller design (PID) for runtime cache adaptation, Chips-to-BIP transformation, and simulation-based validation. The key contribution is showing that a CT-based control loop can stabilize a cloud-like component (image provider) by dynamically tuning the cache size to meet a target response time, with results illustrating convergence toward the desired timing and a full end-to-end modeling pipeline. This approach provides a systematic pathway to design, analyze, and validate adaptivity in complex distributed systems, with clear directions for compiler development and language-extension work.

Abstract

When designing new web applications, developers must cope with different kinds of constraints relative to the resources they rely on: software, hardware, network, online micro-services, or any combination of the mentioned entities. Together, these entities form a complex system of communicating interdependent processes, physical or logical. It is very desirable that such system ensures its robustness to provide a good quality of service. In this paper we introduce Chips, a language that aims at facilitating the design of models made of various entwined components. It allows the description of applications in the form of functional blocks. Chips mixes notions from control theory and general purpose programming languages to generate robust component-based models. This paper presents how to use Chips to systematically design, model and analyse a complex system project, using a variation of the Adaptable TeaStore application as running example.

Fancy Some Chips for Your TeaStore? Modeling the Control of an Adaptable Discrete System

TL;DR

This work presents Chips, a language for designing adaptable distributed systems that blends control theory and aggregate programming with a synchronous dataflow style, enabling automated generation of BIP models. Using an Adaptable TeaStore as a running example, the authors demonstrate a complete workflow: requirements analysis, Chips model construction, controller design (PID) for runtime cache adaptation, Chips-to-BIP transformation, and simulation-based validation. The key contribution is showing that a CT-based control loop can stabilize a cloud-like component (image provider) by dynamically tuning the cache size to meet a target response time, with results illustrating convergence toward the desired timing and a full end-to-end modeling pipeline. This approach provides a systematic pathway to design, analyze, and validate adaptivity in complex distributed systems, with clear directions for compiler development and language-extension work.

Abstract

When designing new web applications, developers must cope with different kinds of constraints relative to the resources they rely on: software, hardware, network, online micro-services, or any combination of the mentioned entities. Together, these entities form a complex system of communicating interdependent processes, physical or logical. It is very desirable that such system ensures its robustness to provide a good quality of service. In this paper we introduce Chips, a language that aims at facilitating the design of models made of various entwined components. It allows the description of applications in the form of functional blocks. Chips mixes notions from control theory and general purpose programming languages to generate robust component-based models. This paper presents how to use Chips to systematically design, model and analyse a complex system project, using a variation of the Adaptable TeaStore application as running example.
Paper Structure (29 sections, 2 equations, 10 figures, 1 table)

This paper contains 29 sections, 2 equations, 10 figures, 1 table.

Table of Contents

  1. Introduction
  2. Overview of the Chips language
  3. Chips technical and theoretical base
  4. Chips programming principles
  5. A synchronous programming language
  6. Non-standard synchronous language
  7. Signals aggregation and profiling
  8. Refining models with hardware specifications
  9. Designing an Adaptable TeaStore with Chips
  10. TeaStore requirement analysis
  11. Goals identification
  12. Knobs identification
  13. A TeaStore Chips model
  14. Model devise
  15. Achieving adaptivity
  16. ...and 14 more sections

Figures (10)

  • Figure 1: Block diagram of the designed architecture for the TeaStore application and its interaction with a user
  • Figure 2: Dependency graph of the designed architecture for the TeaStore application and its interaction with a user
  • Figure 3: In depth block diagram of the Data Treatment Block
  • Figure 4: Data Treatment Block handling several Image Provider instances
  • Figure 5: A Chips implementation of a PID controller and its BIP model equivalent
  • ...and 5 more figures