Frequency-Multiplexed Millimeter-Wave Fault-Tolerant Superconducting Qubits Enabled by an On-Chip Nonreciprocal Control Bus

TL;DR

This work tackles the wiring and crosstalk bottlenecks in scalable superconducting quantum processors by introducing an on‑chip, nonreciprocal, space‑time‑periodic frequency multiplier that acts as a universal, low‑frequency XY drive bus. By up‑converting a single ωm input into a harmonic comb, distinct‑frequency qubits can be addressed in parallel with strong isolation, suppressing Purcell decay and coherent crosstalk across a wide band. A rigorous Hamiltonian framework and an error model quantify coherence gains and fault‑tolerant scalability, supported by numerical simulations of a 25‑qubit array showing T1 and T2 enhancements and gate errors well below the fault‑tolerance threshold. The architecture also reveals rich dynamics, including non‑Markovian noise engineering and cosmology‑like wave propagation, positioning this approach as a practical route to medium‑scale quantum processing with simplified I/O and enhanced noise resilience.

Abstract

Scaling superconducting quantum processors is fundamentally limited by the escalating complexity of cryogenic wiring and the debilitating effects of microwave crosstalk and Purcell decay. This paper proposes the concept of frequency-multiplexed millimeter-wave superconducting qubits and demonstrates a novel architecture that integrates an on-chip cryogenic nonreciprocal space-time-periodic superconducting frequency multiplier as a universal control bus for a frequency-multiplexed qubit array. The bus replaces multiple high-frequency XY drive lines with a single low-frequency input tone, which the multiplier converts into a comb of high-order harmonics, each resonantly addressing a distinct qubit. Crucially, the dynamic and nonreciprocal nature of the bus provides signal gain and intrinsic isolation that simultaneously suppresses Purcell decay, enhancing T1 times across all distinct-frequency qubits, and reduces coherent crosstalk by more than two orders of magnitude. The spatiotemporal modulation enables parametric frequency multiplication and creates wave-propagation dynamics analogous to cosmological expansion, with observed redshift-like broadening and deceleration of magnetic-field wavepackets. Theoretical modeling based on a non-Markovian master equation confirms that the engineered memory kernel extends coherence while reshaping the noise spectrum. Full error-budget analysis shows that the architecture maintains gate errors below the fault-tolerance threshold for arrays exceeding 25 qubits, converting a crosstalk-dominated error budget into one limited by intrinsic material coherence. This integrated, frequency-multiplexed, and nonreciprocal control bus therefore offers a path toward unprecedented I/O simplification, noise resilience, and scalable high-coherence quantum processin

Figures (14)

• Figure 1: Conceptual architecture of the nonreciprocal frequency‑multiplexed superconducting quantum processor. A space‑time‑periodic superconducting current density $J(z,t) = I_0 \sin[\rho(z, \omega_m t)]$ parametrically generates a frequency comb spanning harmonics $n\omega_m, (n+1)\omega_m, \dots, N\omega_m$. Each harmonic resonantly addresses a distinct flux‑tunable transmon qubit ($Q_n, Q_{n+1}, \dots, Q_N$) via its respective transition, enabled by the nonreciprocal superconducting frequency bus. The bus provides directional signal flow (arrows) while suppressing both Purcell decay and inter‑qubit crosstalk, enabling a single low‑frequency input $\omega_m$ to control an entire array of qubits with fault‑tolerant gate errors.
• Figure 2: Integrated on-chip architecture for frequency-multiplexed superconducting qubits. The device consists of a linear array of flux-tunable transmon qubits (top) coupled to a space‑time‑modulated superconducting frequency multiplier that serves as a nonreciprocal control bus (bottom). Each qubit's SQUID loop is addressed by a dedicated DC flux bias (Z‑control), setting its frequency to a distinct harmonic of the modulation frequency. A single low‑frequency RF input drives the parametric comb generation in the multiplier, while the nonreciprocal bus provides directional isolation to suppress Purcell decay and crosstalk, enabling scalable fault‑tolerant operation.
• Figure 3: Cryogenic measurement setup for multi-frequency qubit control and readout. The system comprises distinct paths for XY control, Z (flux) control, and multiplexed readout. The XY control line (top left) delivers microwave pulses through heavily attenuated coaxial lines with filtering at multiple temperature stages. The Z control line (bottom) provides DC and fast flux bias through low-pass filtered lines. The readout system (right) employs a multi-tone synthesizer for frequency-division multiplexing, with reflected signals amplified by a cryogenic HEMT amplifier (3 K) and room-temperature amplifiers before digitization. Magnetic shielding surrounds the sample at the base temperature stage (10 mK).
• Figure 4: Magnetic field distribution for magnetic flux excitation at frequency $\omega_\text{m}$ incident from the left, showing significant frequency multiplication in the spatiotemporal superconducting array. The array parameters are $\widetilde{\Phi}\text{dc}=0.6$ and $\widetilde{\Phi}\text{rf}=0.6$. These time-domain results show the field distribution at successive time steps: (a) $t=0.3$ ns, (b) $t=0.37$ ns, (c) $t=0.5$ ns, (d) $t=0.6$ ns, and (e) $t=0.8$ ns.
• Figure 5: Magnetic field distribution for magnetic flux excitation at frequency $\omega_\text{m}$ incident from the left, showing significant frequency multiplication in the nonreciprocal superconducting frequency bus. The bus parameters are $\widetilde{\Phi}\text{dc}=0.7$ and $\widetilde{\Phi}\text{rf}=0.6$. These time-domain results show the field distribution at successive time steps: (a) $t=0.3$ ns, (b) $t=0.5$ ns, (c) $t=0.8$ ns.