Towards Pixel-Wise Anomaly Location for High-Resolution PCBA via Self-Supervised Image Reconstruction

TL;DR

The paper tackles pixel-level anomaly localization on high-resolution PCBA images under extreme data imbalance by proposing HiSIR-Net, a self-supervised reconstruction framework enhanced with SIR-Gate to suppress irrelevant reconstruction and ROPS to coherently merge overlapping patches at 4K resolution. It introduces SIPCBA-500, a 4K industrial benchmark with normal-only training and pixel-precise defect annotations. Empirical results show state-of-the-art pixel-wise metrics (AUROC, AUPRO) and low false-positive rates, with practical inference speed, demonstrating industrial viability. The work offers backbone-adaptive mechanisms and extensive ablations, highlighting robustness, generalization limits, and targeted improvements for high-resolution PCBA inspection.

Abstract

Automated defect inspection of assembled Printed Circuit Board Assemblies (PCBA) is quite challenging due to the insufficient labeled data, micro-defects with just a few pixels in visually-complex and high-resolution images. To address these challenges, we present HiSIR-Net, a High resolution, Self-supervised Reconstruction framework for pixel-wise PCBA localization. Our design combines two lightweight modules that make this practical on real 4K-resolution boards: (i) a Selective Input-Reconstruction Gate (SIR-Gate) that lets the model decide where to trust reconstruction versus the original input, thereby reducing irrelevant reconstruction artifacts and false alarms; and (ii) a Region-level Optimized Patch Selection (ROPS) scheme with positional cues to select overlapping patch reconstructions coherently across arbitrary resolutions. Organically integrating these mechanisms yields clean, high-resolution anomaly maps with low false positive (FP) rate. To bridge the gap in high-resolution PCBA datasets, we further contribute a self-collected dataset named SIPCBA-500 of 500 images. We conduct extensive experiments on our SIPCBA-500 as well as public benchmarks, demonstrating the superior localization performance of our method while running at practical speed. Full code and dataset will be made available upon acceptance.

Figures (7)

• Figure 1: Our HiSIR-Net mainly consists of two novel modules: (i) SIR-Gate to suppress irrelevant reconstruction noise, and (ii) ROPS to select the best reconstruction from overlapping patches. Clearly, our method significantly outperforms existing methods (e.g., GLASS10.1007/978-3-031-72855-6_3, PatchCoreroth2022towards & Efficient-ADbatznerEfficientadAccurateVisual2024).
• Figure 2: Overall pipeline of HiSIR-Net with SwinUnet as backbone. In part ROPS, regions with the same color on PCBA are from the same patch, regions with different colors are from different patches.
• Figure 3: With the proposed SIR-Gate, reconstruction noise is greatly suppressed across different backbones.
• Figure 4: Visual comparison of reconstruction results under different patch combination strategies: (a) without positional encoding or overlaps, (b) with positional encoding only, (c) with overlap and pixel-level merging, (d) with overlap and ROPS.
• Figure 5: Qualitative comparison results show that HiSIR-Net produces less background noise and clearer anomalies. Note that our model operates on the original full-resolution PCBA images; for visualization clarity, we display cropped sub-images from these large inputs.