How to Square Tensor Networks and Circuits Without Squaring Them
Lorenzo Loconte, Adrián Javaloy, Antonio Vergari
TL;DR
This work addresses the marginalization and normalization bottlenecks of squared tensor networks and squared probabilistic circuits by introducing orthogonality- and unitarity-based constraints. The authors develop a unitary, tensorized-circuit framework that generalizes canonical TN forms to circuits, enabling already-normalized squared distributions and linear-time marginalization even for non-structured decomposable factorizations. They provide a Marginalization algorithm with tight complexity bounds and demonstrate through experiments on image datasets and synthetic data that the proposed methods deliver efficiency gains without sacrificing expressiveness. The results suggest a broader potential for flexible, scalable Born-machine-like models and invite future work on new factorization structures that maintain tractable inference.
Abstract
Squared tensor networks (TNs) and their extension as computational graphs--squared circuits--have been used as expressive distribution estimators, yet supporting closed-form marginalization. However, the squaring operation introduces additional complexity when computing the partition function or marginalizing variables, which hinders their applicability in ML. To solve this issue, canonical forms of TNs are parameterized via unitary matrices to simplify the computation of marginals. However, these canonical forms do not apply to circuits, as they can represent factorizations that do not directly map to a known TN. Inspired by the ideas of orthogonality in canonical forms and determinism in circuits enabling tractable maximization, we show how to parameterize squared circuits to overcome their marginalization overhead. Our parameterizations unlock efficient marginalization even in factorizations different from TNs, but encoded as circuits, whose structure would otherwise make marginalization computationally hard. Finally, our experiments on distribution estimation show how our proposed conditions in squared circuits come with no expressiveness loss, while enabling more efficient learning.
