Competent Discrete Time Modeling For analogue controlled PWM Converter Considering State-Feedback

TL;DR

This paper addresses the inadequacy of traditional average models for high-bandwidth PWM converters by surveying and developing modeling frameworks that capture sidebands and ripple. It advances a unified Poincaré-map-based approach, alongside multi-frequency, sampled-data, and closed-loop methods, and derives recursive closed-form and fixed-point equations for steady-state behavior. Key contributions include Jacobian-based linearization across four PWM logics, explicit edge-time to duty perturbation mappings, and Li–Jian distillation to a port-structured MIMO form that reveals volt-second and amp-second balances as solvability conditions. The resulting toolkit enables analytic stability analysis and controller design for analogue-controlled PWM converters operating beyond the assumptions of low ripple and low bandwidth, with practical demonstrations such as the buck example illustrating classic volt-second behavior within the distilled framework.

Abstract

Ever since R.D.Middlebrook proposed the state space averaging notion. The small signal model has been widely used as a design tool to tune control parameters. As Moore's law is continuing and the AI chip's high demand for power consumption and dynamic response, the control bandwidth needs to be boosted. However, the average model has two basic assumptions: the low-frequency assumption, the small ripple assumption. In high-bandwidth design, these two assumptions are violated. In order to solve this, various methods have been proposed. This paper gives a comprehensive overview of the existing small signal model for PWM converters from the following perspectives: 1. model fidelity, 2. analytical tractability. 3. complexity of the derivation process and result 4.generality.