The new truly cylindrical tracker for the ALICE ITS3

TL;DR

The paper presents the ITS3 upgrade concept for ALICE, introducing truly cylindrical, wafer-scale MAPS bent around the beam pipe with air cooling to dramatically reduce material budget and improve vertexing. It details bending feasibility of sub-50 µm silicon, validates advanced 65 nm CMOS sensor variants with weightless edge supports, and demonstrates high timing precision (down to ~63 ps, and ~50 ps under the electrode) alongside >99% efficiency and ultra-low fake-hit rates. A cornerstone is the Monolithic Stitched Sensor (MOSS) and the MOSAIX architecture, enabling long, seamless sensors via stitching, with a 6.7 MP prototype achieving >90% active area and robust radiation tolerance. Mechanical and thermal studies show 8 m/s air cooling provides uniform temperatures and minimal vibration, supporting the practical deployment of ITS3 in Run 4. Overall, ITS3 combines bending, stitching, and air cooling to realize a first-of-its-kind cylindrical, wafer-scale MAPS tracker with strong performance under realistic ALICE conditions.

Abstract

The ALICE collaboration is preparing an upgrade of the three innermost layers of the current Inner Tracking System (ITS) during the next LHC long shutdown (LS3). The new ITS detector will use wafer-scale (up to \SI{27}{cm} in length) Monolithic Active Pixel Sensors with a \SI{65}{nm} CMOS Image Sensor process, thinned to \SI{50}{\micro m} and bent around the beam pipe. The planned upgrade will allow the use of only two sensors per tracker layer, kept in place by just two mechanical supports at the edges and two thin carbon fibre supports at the sensor border. The substitution of water cooling with air cooling will lead to an expected reduction of the material budget per-layer from $\sim$0.36\% $X_0$ of the current detector to 0.09\% $X_0$. The R\&D process also led to the development of a new sensor variant with an additional low dose n-type implant to the previous detector. This improves charge collection speed, confirms a spatial resolution of about \SI{5}{\micro m}, a detection efficiency greater than 99\% and an excellent radiation tolerance. Large area prototypes proved the possibility to have an active area greater than 90\%, and a fake hit rate lower than \SI{e-6}{hits/pixel/event} without loosing detection efficiency. This proceeding will show the above innovations, with particular attention to a small area analogue test structure featuring a front-end which can be monitored via an on-chip Operational Amplifier buffer that preserves the steep signal edge (few hundreds of ps) in order to study the sensor timing performance. The characterization proved a time resolution of \SI{63}{ps} on average and \SI{50}{ps} for signal passing right under the electrode with a detection efficiency above 99\%.

Figures (14)

• Figure 1: Schematic view of the ITS3 upgrade: it is possible to identify the detector structure composed by six half-cylinder silicon sensors ITS3_2024_Liu.
• Figure 2: Impact parameter resolution in the xy (left) and z (right) direction of the ITS2, ITS2 + TPC and expected resolution of ITS3, ITS3 + TPC. In both plots, the dots represent the result of a full simulation of the ITS while lines are obtained with a fast simulation (FAT) ITS3_TDR.
• Figure 3: Setup for bending strength measurements (on the left) and bending results on ALPIDE and 65nm sensors (on the right) ITS3_TDR.
• Figure 4: On the left: ALPIDE bent along the short edge and wire bonded to a carrier board. On the right: inefficiency of the ALPIDE chip bent along short axis as a function of threshold for different rows and incident angles BentALPIDE.
• Figure 5: Efficiency of bent ALPIDE sensors as a function of the threshold for the three different bending radii compared to flat sensors micro_ITS3.