Mitigating Residual Exchange Coupling in Resonant Singlet-Triplet Qubits

TL;DR

The paper addresses residual exchange errors in exchange-coupled resonant singlet-triplet qubits and proposes two mitigation strategies: commensurate intra-qubit driving to suppress coherent and leakage errors, and a single-spin coupler to suppress inter-qubit crosstalk. Using a four-spin chain model and realistic noise, it demonstrates that commensurate driving yields robust single-qubit gates even with sizable intra-qubit residual exchange, while a central spin coupler can dramatically reduce ZZ-induced crosstalk and enable fast, low-leakage two-qubit CZ gates. The results show CZ gate errors down to a few ×10^-3 and leakage below 4×10^-4 under 1/f charge and hyperfine noise, with gate times on the order of tens of nanoseconds, provided the coupler is perfectly initialized. Together, these findings point to a scalable RST–coupler–RST unit cell approach for fault-tolerant spin-qubit processors in semiconductor quantum-dot architectures.

Abstract

We propose methods to mitigate single- and two-qubit control errors due to residual exchange coupling in systems of exchange-coupled resonant singlet-triplet qubits. Commensurate driving, where the pulse length is an integer multiple of the drive period, can mitigate errors from residual intra-qubit exchange, including effects from counter rotating terms and off-axis rotations, as well as leakage errors during two-qubit operations. Residual inter-qubit exchange creates crosstalk errors that reduce single-qubit control fidelities. We show that using a single-spin coupler between two resonant singlet-triplet qubits can reduce this crosstalk error by an order of magnitude. Assuming perfect coupler state preparation and realistic charge and hyperfine noise, we predict that coupler-assisted two-qubit gate errors can be below $3\times10^{-3}$ for gate times as short as $66~\text{ns}$, even in the presence of residual exchange levels exceeding several hundred kHz. Our results suggest the potential of utilizing coupler-based architectures for large scale fault-tolerant spin qubit processors based on resonant singlet-triplet qubits.

Figures (8)

• Figure 1: (a) One-dimensional four-spin chain with spins $S1$ to $S4$. Two RST qubits are coupled though inter-qubit residual exchange $J_{23}^r$ with individual intra-qubit residual exchange couplings $J_{12}^r$ and $J_{34}^r$, respectively. Arbitrary single-qubit rotations can be realized by resonant intra-qubit exchange pulses together with virtual-Z gates. A CPhase gate can be achieved by pulsing inter-qubit exchange coupling. (b) Energy levels. The middle four levels and the remaining two levels span the computational and leakage subspaces, respectively. The inter-qubit exchange coupling $J_{23}$ couples states between the two subspaces, causing leakage errors. (c) ZZ-interaction $\zeta$ vs. inter-qubit exchange coupling $J_{23}$.
• Figure 2: (a) An inter-dot tunneling-gate voltage pulse with a logarithmic-cosine envelope can generate an exchange pulse with a cosine envelope. (b)-(d) Trajectory on the Bloch sphere during a $\pi/2$ rotation with phase $\pi/4$, illustrated in solid lines. The corresponding dashed lines are the ideal rotations. The pulse width at each case is (b) $3.3\tau_L$, (c) $4\tau_L$, and (d) $20\tau_L$. An unfinished fast rotation for $3.3\tau_L$ is observed.
• Figure 3: Single-qubit gate for a RST qubit with intra-qubit residual exchange coupling $J_\text{intra}^r / \hbar = 2\pi \times 2~\text{MHz}$. (a) Exchange pulse waveform with carrier phase $\varphi$ driving a qubit $\pi/2$-rotation $R(\pi/2,\varphi)$. (b) Coherent error of the $\pi/2$ rotation for different carrier phases and pulse widths. (c) Horizontal traces from panel (b) at different carrier phases. Local minima of the gate infidelity occur when the pulse width is an integer multiple of the Larmor period.
• Figure 4: Error budget of a commensurately-driven $\pi/2$ gate. (a) Coherent error. (b) Charge noise error. (c) Hyperfine noise error. (d) All errors.
• Figure 5: $X_{\pi/2}$ and CZ gate error of two exchanged-coupled RST qubits. (a) CZ gate error with different pulse widths and hyperfine noise amplitudes with $J_{23}^r/h=0.4~\text{MHz}$. (b) CZ gate error with $\sigma_{Bz}=2\pi\times0.04~\text{MHz}$ and varying pulse widths and inter-qubit residual exchange values. (c) Leakage and coherent error budget of a CZ gate with $J_{23}^r/h=0.4~\text{MHz}$. (d) $X_{\pi/2}$ gate error with different inter-qubit residual exchange coupling $J_\text{inter}^r=J_{23}^r$ and hyperfine noise amplitudes. The gate time used here is $10\tau_L$.