A Space-Charge-Limited van der Waals Spin Transistor
Thomas K. M. Graham, Yu-Xuan Wang, Niranjana Renjith Nair, Kseniia Mosina, Kenji Watanabe, Takashi Taniguchi, Zdenek Sofer, Brian B. Zhou
TL;DR
The work addresses the challenge of achieving transistor-like operation with nonvolatility in 2D magnetic semiconductors by introducing a space-charge-limited spin transistor (SCST) that blends vertical and lateral transport across a monolayer-bilayer CrSBr junction. Gate-controlled electrostatic doping tunes carrier density and interlayer exchange, delivering giant gate-tunable magnetoresistance up to 3000% (TMR) in a device only two atomic layers thick. Correlated electrical transport and scanning NV center magnetometry reveal a field-training and layer-sharing mechanism that governs domain-wall motion during spin-flip transitions, enabling multilevel memristive conductance states. The results demonstrate the potential of 2D magnetic semiconductors for nonvolatile and neuromorphic computing by providing electrically controllable interlayer coupling and spintronic functionality in ultrathin platforms.
Abstract
Integrating semiconducting and magnetic materials could combine transistor-like operation with nonvolatility and enable architectures such as logic-in-memory. Here, we employ correlated electrical transport and scanning nitrogen-vacancy (NV) center magnetic imaging to elucidate a spin transistor concept that amalgamates both vertical and lateral transport in a 2D antiferromagnetic semiconductor, distinct from purely vertical tunneling devices. Our device, based on a monolayer-bilayer junction in CrSBr, displays giant, gate-tunable magnetoresistance driven by the dual action of electrostatic doping on space-charge-limited lateral conduction and interlayer exchange coupling. Moreover, we visualize a field-trainable, layer-sharing effect that selects between coherent or domain-wall reversal at the spin-flip transition, enabling multilevel, memristive conductance states. These findings open opportunities for 2D magnetic semiconductors to address limitations in contemporary computing.
