Model Recovery at the Edge under Resource Constraints for Physical AI
Bin Xu, Ayan Banerjee, Sandeep K. S. Gupta
TL;DR
The paper tackles the challenge of deploying Model Recovery (MR) for physical AI on resource-constrained edge devices. It introduces MERINDA, an FPGA-accelerated MR framework that replaces iterative ODE solvers with a GRU-based neural-flow architecture equivalent to NODEs, trained with an ODE loss to reproduce dynamics. The work provides a theoretical basis via equivalence proofs and the MACE theorem, and develops explicit memory and energy models to guide hardware design. Empirical results across simulated and real-world datasets show MERINDA achieves comparable accuracy to state-of-the-art MR methods while delivering substantial reductions in DRAM usage and energy, plus significant runtime benefits on FPGA relative to GPUs. The findings highlight a fundamental energy–memory tradeoff and demonstrate the practicality of edge-ready, reconfigurable MR for mission-critical autonomous systems.
Abstract
Model Recovery (MR) enables safe, explainable decision making in mission-critical autonomous systems (MCAS) by learning governing dynamical equations, but its deployment on edge devices is hindered by the iterative nature of neural ordinary differential equations (NODEs), which are inefficient on FPGAs. Memory and energy consumption are the main concerns when applying MR on edge devices for real-time operation. We propose MERINDA, a novel FPGA-accelerated MR framework that replaces iterative solvers with a parallelizable neural architecture equivalent to NODEs. MERINDA achieves nearly 11x lower DRAM usage and 2.2x faster runtime compared to mobile GPUs. Experiments reveal an inverse relationship between memory and energy at fixed accuracy, highlighting MERINDA's suitability for resource-constrained, real-time MCAS.
