Modeling and Simulation Frameworks for Processing-in-Memory Architectures

TL;DR

This chapter surveys the landscape of simulation frameworks for Processing-in-Memory (PIM), foregrounding simulation as essential for evaluating diverse memory-centric designs before fabrication. It introduces a comprehensive eight-axis taxonomy (accuracy, scope, granularity, workload feeding, abstraction levels, memory technologies, deployment contexts, and benchmarks), surveys open-source simulators, and details PIM-specific benchmarks and evaluation metrics. A key contribution is the comparative study of PIMeval and PIMSimulator, illustrating how different fidelity levels and workloads impact performance predictions and design insights. The discussion highlights challenges in fidelity scaling, standardization, and cross-layer co-design, and argues for hybrid modeling and tighter hardware–software co-verification to accelerate PIM technology from research to practice.

Abstract

Processing-in-Memory (PIM) has emerged as a promising computing paradigm to address the memory wall and the fundamental bottleneck of the von Neumann architecture by reducing costly data movement between memory and processing units. As with any engineering challenge, identifying the most effective solutions requires thorough exploration of diverse architectural proposals, device technologies, and application domains. In this context, simulation plays a critical role in enabling researchers to evaluate, compare, and refine PIM designs prior to fabrication. Over the past decade, a variety of PIM simulators have been introduced, spanning low-level device models, architectural frameworks, and application-oriented environments. These tools differ significantly in fidelity, scalability, supported memory/compute technologies, and benchmark compatibility. Understanding these trade-offs is essential for researchers to select appropriate simulators that accurately map and validate their research efforts. This chapter provides a comprehensive overview of PIM simulation methodologies and tools. We categorize simulators according to abstraction levels, design objectives, and evaluation metrics, highlighting representative examples. To improve accessibility, some content may appear in multiple contexts to guide readers with different backgrounds. We also survey benchmark suites commonly employed in PIM studies and discuss open challenges in simulation methodology, paving the way for more reliable, scalable, and efficient PIM modeling.

Figures (13)

• Figure 1: Timeline of PIM simulators
• Figure 2: Overall structure of this chapter
• Figure 3: Abstract view of trace-driven simulation.
• Figure 4: Memory Technologies in PIM Simulation.
• Figure 5: Hierarchical organization of a DRAM module.