A 3D-integrated BiCMOS-silicon photonics high-speed receiver realized using micro-transfer printing

TL;DR

This paper tackles the challenge of delivering ultrafast optical interconnects by integrating photonic and electronic components across heterogeneous processes. It introduces a 3D, μTP-based assembly that places a SiGe BiCMOS chiplet directly onto a silicon photonics chip, achieving a compact, low-parasitic optical receiver. The work demonstrates 224 Gb/s PAM-4 operation with -5.2 dBm OMA at BER $2.4\times10^{-4}$ and an energy efficiency of 0.51 pJ/b on a 0.06 mm^2 EIC, highlighting μTP as a scalable route to multi-channel, cost-efficient interconnects. This approach paves the way for high-density, AI-era optical links and can be extended to more advanced modulation formats and coherent imaging systems, fundamentally tightening the integration gap between photonics and electronics.

Abstract

Meeting the escalating demands of data transmission and computing, driven by artificial intelligence (AI), requires not only faster optical transceivers but also advanced integration technologies that can seamlessly combine photonic and electronic components. Traditional approaches struggle to overcome the parasitic limitations arising from fabricating those components using different processes. Here, we report a novel 3D heterogeneously integrated optical receiver based on micro-transfer printing (μTP), enabling the co-integration of a compact bipolar CMOS (BiCMOS) electronic chiplet (0.06 mm2) directly onto a silicon photonic integrated circuit (SiPIC). While previous μTP demonstrations have focused primarily on photonic integration, our work pioneers the direct integration of electronics and photonics, significantly enhancing performance and scalability. The resulting optical receiver achieves 224 Gb/s four-level pulse amplitude modulation (PAM-4) operation, delivering -5.2 dBm optical modulation amplitude(OMA) sensitivity at a bit-error rate (BER) of 2.4 x 10-4, a record-small footprint, and an excellent power efficiency of 0.51 pJ/b. This demonstration not only showcases the potential of μTP for high-density, cost-efficient integration but also represents a critical step toward next-generation optical interconnects in the AI era.

Figures (6)

• Figure 1: (a) 3D diagram of the optical receiver consisting of an EIC chiplet micro-transfer printed on a SiPIC and metal traces (b) Cross-section diagram of the optical receiver (c) Micrograph of the optical receiver (d) Micrograph of the EIC chiplet.
• Figure 2: A1–A6, Source fabrication steps including in-situ Au deposition, chiplet singulation, encapsulation, via opening, release, and $\mu$TP pick-up. A5'-A6': top view of released chiplet on source and stamp corresponding to A5-A6. B1–B8, Transfer printing and post-metallization steps including target cleaning, bumping, DVS-BCB coating, $\mu$TP placement, curing, ramping, via opening, and final metallization. B5'-B8': top view of chiplet printed, covered by ramp, via-opened and metallized corresponding to B5-B8.
• Figure 3: Opto-electrical performance. (a) Block diagram of the optical receiver (b) Opto-electrical frequency response experiment setup (c) Measured OE response (d) Measured output reflection coefficient.
• Figure 4: Data transmission experiment setup
• Figure 5: Data transmission experiment results. (a) 56 Gb/s NRZ eye diagram measured at -11.4 dBm. (b) 112 Gb/s PAM-4 eye diagram measured at -5.1 dBm. (c) 112 Gb/s NRZ eye diagram measured at -8.4 dBm. (d) 224 Gb/s PAM-4 eye diagram measured at -3.6 dBm with 6-tap FFE. (e) Measured 56 Gb/s and 112 Gb/s NRZ BER curves.(f) Measured 112 Gb/s and 224 Gb/s PAM-4 BER curves.