Automated Discovery of Laser Dicing Processes with Bayesian Optimization for Semiconductor Manufacturing

TL;DR

The paper tackles the bottleneck of configuring high-precision laser dicing for new wafer materials by introducing BOLD, a Bayesian optimization framework that handles 11 interdependent process parameters under multiple constraints and conflicting objectives. It integrates high-dimensional trust-region BO, learned non-linear constraints via Thompson sampling, expert-guided scalarization, and a two-stage fidelity strategy to minimize costly die-strength tests. Experimental validation on industrial LASER1205 equipment shows autonomous discovery can meet or exceed production targets, with notable speed gains and robust die strength, including a 34% speed improvement when combined with expert refinement. The work demonstrates a practical path to autonomous process discovery in complex manufacturing, with potential extensions to co-design of optical hardware, Pareto-front exploration, and transfer learning across materials and products.

Abstract

Laser dicing of semiconductor wafers is a critical step in microelectronic manufacturing, where multiple sequential laser passes precisely separate individual dies from the wafer. Adapting this complex sequential process to new wafer materials typically requires weeks of expert effort to balance process speed, separation quality, and material integrity. We present the first automated discovery of production-ready laser dicing processes on an industrial LASER1205 dicing system. We formulate the problem as a high-dimensional, constrained multi-objective Bayesian optimization task, and introduce a sequential two-level fidelity strategy to minimize expensive destructive die-strength evaluations. On bare silicon and product wafers, our method autonomously delivers feasible configurations that match or exceed expert baselines in production speed, die strength, and structural integrity, using only technician-level operation. Post-hoc validation of different weight configurations of the utility functions reveals that multiple feasible solutions with qualitatively different trade-offs can be obtained from the final surrogate model. Expert-refinement of the discovered process can further improve production speed while preserving die strength and structural integrity, surpassing purely manual or automated methods.

Figures (11)

• Figure 1: Automated discovery of semiconductor laser dicing processes via Bayesian optimization. Finding optimal process configurations is a critical challenge in semiconductor manufacturing. We propose a closed-loop framework that bridges (Left) Bayesian optimization and (Right) semiconductor laser dicing. A probabilistic surrogate model (Gaussian process) captures the complex laser-material interactions to guide the exploration, while the industrial setup executes the multi-pass dicing process. The goal is to discover a configuration of 11 process parameters (Table \ref{['tab:process_params']}) that simultaneously optimizes 6 objectives while strictly adhering to 10 non-linear constraints (Table \ref{['tab:quality_params']}). After selecting the most promising candidate, the measurements of the true objective functions and constraint outcomes are fed back into the training of the surrogate model, iteratively refining the search and replacing manual expert tuning with a data-efficient, automated discovery loop.
• Figure 2: (Left) Separated dies on a semiconductor wafer, and post-processed die using laser dicing. (Right) Diffractive optical element (DOE) and objective lens used for beam-splitting, a process that maximizes available laser power while minimizing the heat-affected zone.
• Figure 3: Laser dicing streets and key metrics. Top-down (left) and cross-section (right) views of the laser dicing street. The two perspectives illustrate the key metrics (dicing, width, kerf width, burr height) and structural defects (cracks) that define the quality of the dicing process.
• Figure 4: Experimental setup used throughout all experiments. Die strength testing (top left), optical inspection (top right), together with the LASER1205 D-UVP system inside (bottom left) and outside (bottom right).
• Figure 5: Bare Silicon Wafer Experiment. Frontside (left) and backside (right) of a processed die separated by the best configuration discovered by BOLD.