Initial Assessment of Second Generation of Large-Area Picosecond Photodetectors with Multi-Channel Systems-on-a-Chip Readout

TL;DR

This work assesses the second generation Large Area Picosecond Photodetectors (LAPPD Gen 2) using multi-channel, system-on-a-chip readouts (AARDVARC and HDSoC) to explore picosecond timing capabilities for separating Cherenkov and scintillation light in future neutrino detectors. It combines detailed sensor characterization with high-speed readout electronics, demonstrating sub-nanosecond timing resolution in optimized, multi-pixel configurations and identifying factors that affect jitter, such as photon flux and channel cross-talk. The results establish a platform for systematic timing studies (including raster scans and simulations) to optimize LAPPD-based detectors for water-based scintillators and Cherenkov/scintillation discrimination. The work has broader applicability beyond neutrino experiments, providing methods and infrastructure for fast-timing photodetector research and development.

Abstract

We first briefly describe the history and motivation behind Cherenkov and scintillation light detection. We then discuss the instrumentation needed to detect these photons as it applies to both photodetectors and readout electronics. One of the motivations is future large neutrino detectors that could in principle differentiate between Cherenkov and scintillation light if using novel water-based scintillators. In this paper, we present the first measurements utilizing the second generation of Large Area Picosecond Photodetectors (LAPPDs) in conjunction with commercial system-on-a-chip readouts from Nalu Scientific -- specifically, the High Density System on Chip (HDSoC) and Advanced ASoC Rapid Digitizer, Variable Adaptive Readout Chip (AARDVARC) platforms. These state-of-the-art full-waveform digitizers feature sampling rates on the order of 1 and 10 samples per nanosecond, respectively. Using a picosecond laser, we measured the timing jitter between a pair of LAPPD channels, demonstrating the potential of this setup for precise timing applications.

Figures (21)

• Figure 1: Cherenkov photons and the need for fast timing — an example demonstrating the uniform and directional nature of Cherenkov photons (shown in gray). Magenta photons represent those emitted by knock-on electrons. This simulation also highlights the need for fast timing electronics and fine-grained photosensors in a pixelated detector. The simulation depicts a cosmogenic muon with a few GeV of energy traversing a plastic scintillator cube (13-cm side), producing a knock-on electron that excites the scintillator molecules. The snapshot is taken approximately 1 ns after the muon entered the cube through the top face and is now exiting through the bottom face. The relativistic muon, traveling faster than the speed of light in the medium, produces Cherenkov photons along its path at an angle of approximately 42 degrees to the track. The detector in this example, the miniTimeCube, was tiled with Planacon MCP-PMTs; however, one could imagine using LAPDs instead. At this point in the simulation, scintillation photons have not yet been emitted due to the 1–2 nanosecond delay after the particle's passage. Figure adapted from mTC:2016yys (V.A. Li et al., Review of Scientific Instruments, Vol. 87, 021301, 2016; licensed under a Creative Commons Attribution (CC BY) license.)
• Figure 2: Large-area picosecond photo detector. A photograph of an LAPPD Gen 2, with a person holding it shown to scale. An active square area show is 20 cm $\times$ 20 cm. The two support "ribs" are noticeable, as well as five SHV connectors; the SMA signal connectors are at the back.
• Figure 3: Digitization concept --- track and hold --- the underlying idea behind the Switched Capacitor Array (SCA). Thousands or tens of thousands of capacitors per channel, and multiple channels within an ASIC/SOC. A photograph of a typical die (without the plastic package) --- in this example --- an 8-channel Ice Ring Sampler (IRS), a predecessor to some of the Nalu chips, in addition to capacitors, the chip features several millions of transistors and resistors.
• Figure 4: Exploded view of first- and second-generation LAPPD modules. In the first generation, spacers are arranged in a cross pattern and the anode consists of parallel strips. In the second generation, spacers are two parallel bars and the anode is a single resistive plane. In both diagrams, the top plane represents the glass window with deposited photocathode; three spacers support the glass and two MCPs (MCPs are shown in dark gray); the anode plane is shown in light gray-blue. In the second generation, shims surrounding each of the two MCPs are also depicted. Figures reproduced with permission from Incom.
• Figure 5: A photograph of an LAPPD #133 Gen 2, backplane. Five SHV connectors are: photocathode, entry and exit of the entry MCP, and entry and exit of the exit MCP. 64 SMA connectors are for the anode. 64 transformers are also present at the backplane next to each anode.