Recursive Clifford noise reduction
Aharon Brodutch, Gregory Baimetov, Edwin Tham, Nicolas Delfosse
TL;DR
This work introduces Recursive CliNR, a depth-aware enhancement of Clifford Noise Reduction that recursively applies CliNR subroutines to Clifford circuits arranged in a CliNR tree. Under the circuit-level noise model, it proves that, as $np \to 0$, the logical error can vanish with gate overhead bounded by a polynomial in $sp$ and qubit overhead that scales with the tree depth, significantly extending the regime where logical errors are suppressed beyond the original CliNR. The authors provide a uniformly bounded implementation and rigorous bounds on error propagation across levels, complemented by numerical evidence from Markov-model estimates and Stim simulations showing practical advantages at near-term circuit sizes and error rates. The results suggest that recursive, partially error-corrected Clifford computation can achieve useful reductions in logical errors with relatively modest resource overhead, potentially enabling utility-scale Clifford computations before full fault-tolerant QEC. The work also discusses practical considerations, such as idle noise and tree-parameter optimization, and points to parallelization as a path to further gains.
Abstract
Clifford noise reduction (CliNR) is a partial error correction scheme that reduces the logical error rate of Clifford circuits at the cost of a modest qubit and gate overhead. The CliNR implementation of an $n$-qubit Clifford circuit of size $s$ achieves a vanishing logical error rate if $snp^2\rightarrow 0$ where $p$ is the physical error rate. Here, we propose a recursive version of CliNR that can reduce errors on larger circuits with a relatively small gate overhead. When $np \rightarrow 0$, the logical error rate can be vanishingly small. This implementation requires $\left(2\left\lceil \log(sp)\right\rceil+3\right)n+1$ qubits and at most $24 s \left\lceil(sp)^4\right\rceil $ gates. Using numerical simulations, we show that the recursive method can offer an advantage in a realistic near-term parameter regime. When circuit sizes are large enough, recursive CliNR can reach a lower logical error rate than the original CliNR with the same gate overhead. The results offer promise for reducing logical errors in large Clifford circuits with relatively small overheads.
