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Recursive Clifford noise reduction

Aharon Brodutch, Gregory Baimetov, Edwin Tham, Nicolas Delfosse

TL;DR

This work introduces Recursive CliNR, a depth-aware enhancement of Clifford Noise Reduction that recursively applies CliNR subroutines to Clifford circuits arranged in a CliNR tree. Under the circuit-level noise model, it proves that, as $np \to 0$, the logical error can vanish with gate overhead bounded by a polynomial in $sp$ and qubit overhead that scales with the tree depth, significantly extending the regime where logical errors are suppressed beyond the original CliNR. The authors provide a uniformly bounded implementation and rigorous bounds on error propagation across levels, complemented by numerical evidence from Markov-model estimates and Stim simulations showing practical advantages at near-term circuit sizes and error rates. The results suggest that recursive, partially error-corrected Clifford computation can achieve useful reductions in logical errors with relatively modest resource overhead, potentially enabling utility-scale Clifford computations before full fault-tolerant QEC. The work also discusses practical considerations, such as idle noise and tree-parameter optimization, and points to parallelization as a path to further gains.

Abstract

Clifford noise reduction (CliNR) is a partial error correction scheme that reduces the logical error rate of Clifford circuits at the cost of a modest qubit and gate overhead. The CliNR implementation of an $n$-qubit Clifford circuit of size $s$ achieves a vanishing logical error rate if $snp^2\rightarrow 0$ where $p$ is the physical error rate. Here, we propose a recursive version of CliNR that can reduce errors on larger circuits with a relatively small gate overhead. When $np \rightarrow 0$, the logical error rate can be vanishingly small. This implementation requires $\left(2\left\lceil \log(sp)\right\rceil+3\right)n+1$ qubits and at most $24 s \left\lceil(sp)^4\right\rceil $ gates. Using numerical simulations, we show that the recursive method can offer an advantage in a realistic near-term parameter regime. When circuit sizes are large enough, recursive CliNR can reach a lower logical error rate than the original CliNR with the same gate overhead. The results offer promise for reducing logical errors in large Clifford circuits with relatively small overheads.

Recursive Clifford noise reduction

TL;DR

This work introduces Recursive CliNR, a depth-aware enhancement of Clifford Noise Reduction that recursively applies CliNR subroutines to Clifford circuits arranged in a CliNR tree. Under the circuit-level noise model, it proves that, as , the logical error can vanish with gate overhead bounded by a polynomial in and qubit overhead that scales with the tree depth, significantly extending the regime where logical errors are suppressed beyond the original CliNR. The authors provide a uniformly bounded implementation and rigorous bounds on error propagation across levels, complemented by numerical evidence from Markov-model estimates and Stim simulations showing practical advantages at near-term circuit sizes and error rates. The results suggest that recursive, partially error-corrected Clifford computation can achieve useful reductions in logical errors with relatively modest resource overhead, potentially enabling utility-scale Clifford computations before full fault-tolerant QEC. The work also discusses practical considerations, such as idle noise and tree-parameter optimization, and points to parallelization as a path to further gains.

Abstract

Clifford noise reduction (CliNR) is a partial error correction scheme that reduces the logical error rate of Clifford circuits at the cost of a modest qubit and gate overhead. The CliNR implementation of an -qubit Clifford circuit of size achieves a vanishing logical error rate if where is the physical error rate. Here, we propose a recursive version of CliNR that can reduce errors on larger circuits with a relatively small gate overhead. When , the logical error rate can be vanishingly small. This implementation requires qubits and at most gates. Using numerical simulations, we show that the recursive method can offer an advantage in a realistic near-term parameter regime. When circuit sizes are large enough, recursive CliNR can reach a lower logical error rate than the original CliNR with the same gate overhead. The results offer promise for reducing logical errors in large Clifford circuits with relatively small overheads.

Paper Structure

This paper contains 22 sections, 9 theorems, 27 equations, 6 figures, 1 table, 2 algorithms.

Key Result

Proposition 1

The recursive implementation of an $n$-qubit Clifford circuit requires $(2D+1)n + 1$ qubits.

Figures (6)

  • Figure 1: A $\mathop{\mathrm{CliNR}}\nolimits_1$ circuit. (a) Schematic of the main components for a $\mathop{\mathrm{CliNR}}\nolimits$ circuit, input state, output state, and input circuit$C$. (b) The 3 blocks used to build a $\mathop{\mathrm{CliNR}}\nolimits$ circuit: resource state preparation (RSP), resource state verification (RSV) and resource state injection (RSI). The number of noisy gates in each of these blocks is $A_P n + s$, $(A_V n +B_V)r$ and $A_I n$ respectively. $A_P, A_V, B_V, A_I$ are constants that depend on the implementation ( e.g. number of noisy gates used to implement a stabilizer measurement). For simplicity only a single stabilizer measurement is shown in RSV, in general the RSV block will have multiple stabilizer measurements, all of these can use the same ancilla (bottom rail).
  • Figure 2: Recursive $\mathop{\mathrm{CliNR}}\nolimits$. (a) A depth 2 $\mathop{\mathrm{CliNR}}\nolimits$ tree. Each vertex in the tree has two associated parameters ${\bf r}(v_{\ell,j})=r_{\ell,j}$ and ${\bf s}(v_{\ell,j})=s_{\ell,j}$ referring to the number of stabilizer measurements and size of the subcircuit $C_{\ell, j}$. (b) Schematic for the uniformly bounded implementation of Recursive $\mathop{\mathrm{CliNR}}\nolimits$. Shown is only part of the implementation starting at the beginning of the circuit. Note that the input state for the first (bottom left) $\mathop{\mathrm{CliNR}}\nolimits_1$ block is determined by the previous level. The entire green block is the input circuit to the level above. The specific choice of tree parameters (based on $s$) ensures that the logical error rate at each input ($q_{\ell,j}$) and output (${p_{\log}}$) state/circuit is bounded. Each implementation of $\mathop{\mathrm{CliNR}}\nolimits_{1,R}$ has an input circuit with logical error rate of at most $2/3$ and an output with logical error rate at most $2/3T$. The total error is therefore upper bounded by $(2/3T)t_1$ where $t_1$ is the number of vertices at level 1. (c) Circuit implementation of Recursive $\mathop{\mathrm{CliNR}}\nolimits$ with the tree from (a) and $n=3$. For simplicity $r_{\ell,j}=1$ for all $(\ell,j) \ne (0,0)$. Note that the same ancilla can be used for all stabilizer measurements. The total qubit count is $16$.
  • Figure 3: Numerical estimates of the performance based on the Markov model at (a) $n=70$, $p=10^{-3}$ and (b) $n=400$, $p=10^{-4}$ with no idle noise. In both cases the gate overhead was capped at ${\omega_{\mathop{\mathrm{G}}\nolimits}} < 100$. Plotted points are the Pareto frontiers at depth 1 and 2. Note that the performance estimates tend to be less accurate when the gate overheads are large but the trend remains indicative (see \ref{['app:estimates']}). Results for $n=70$ can be compared with direct simulation in \ref{['fig:pareto']}. Results for $n=400$ show a significant advantage when going to depth 2, e.g. at a gate overhead of ${\omega_{\mathop{\mathrm{G}}\nolimits}} \approx 25.5$ we have ${p_{\log}} \approx 0.35$ at depth 1 and ${p_{\log}} \approx 0.10$ at depth 2.
  • Figure 4: Simulation results at $n=70$ and $p=10^{-3}$. (a) With idle noise; (b) Without idle noise. Results are capped at ${\omega_{\mathop{\mathrm{G}}\nolimits}} <21$. In both cases we see the trend predicted in \ref{['fig:estimated-performance']} as we move from depth 1 (blue diamonds) to depth 2 (red circles). The direct implementation is given as a reference (green dashed line).
  • Figure 5: Estimating the logical error rate and gate overhead. The probability vector $\vec{P}$ is initialized with parameters from $RSP$ and propagated through the stabilizer measurements ($RSV$). Idle noise on the input rails is accounted for during $RSI$ and the logical error rate and expected gate count are calculated. The process is then repeated for the next $\mathop{\mathrm{CliNR}}\nolimits$ block. At each new level we reset the depth-counter and update the expected depth of the input circuit.
  • ...and 1 more figures

Theorems & Definitions (17)

  • Proposition 1: qubit overhead for Recursive $\mathop{\mathrm{CliNR}}\nolimits$
  • Theorem 1
  • proof
  • Lemma 1
  • proof
  • Lemma 2: $\mathop{\mathrm{CliNR}}\nolimits_1$ bounds
  • proof
  • Lemma 3: Logical error bounds for Recursive $\mathop{\mathrm{CliNR}}\nolimits$
  • proof
  • Lemma 4: Gate overhead for $\mathop{\mathrm{CliNR}}\nolimits$ tree
  • ...and 7 more