Lattice Surgery Aware Resource Analysis for the Mapping and Scheduling of Quantum Circuits for Scalable Modular Architectures

TL;DR

<3-5 sentence high-level summary> This paper analyzes resource requirements for distributed fault-tolerant quantum computing using lattice surgery on a 2D mesh of modular cores. It develops a pipeline that transpiles circuits to a fixed universal gate-set, partitions qubits with KaHIP, and maps them to cores via QAPFA, while simultaneously scheduling operations through a network of ancillas and a Magic State Factory. The authors propose an integrated optimization flow—core-to-core and core-to-msf placement plus intra-core qubit ordering—to reduce inter-core transfers and magic-state travel, reporting detailed statistics on classical communication, EPR pairs, magic states, and timing. Experimental results across varied circuit sizes and layouts demonstrate substantial reductions in routing overhead and overall runtime, underscoring the practicality of scalable modular quantum architectures.

Abstract

Quantum computing platforms are evolving to a point where placing high numbers of qubits into a single core comes with certain difficulties such as fidelity, crosstalk, and high power consumption of dense classical electronics. Utilizing distributed cores, each hosting logical data qubits and logical ancillas connected via classical and quantum communication channels, offers a promising alternative. However, building such a system for logical qubits requires additional optimizations, such as minimizing the amount of state transfer between cores for inter-core two-qubit gates and optimizing the routing of magic states distilled in a magic state factory. In this work, we investigate such a system and its statistics in terms of classical and quantum resources. First, we restrict our quantum gate set to a universal gate set consisting of CNOT, H, T, S, and Pauli gates. We then developed a framework that can take any quantum circuit, transpile it to our gate set using Qiskit, and then partition the qubits using the KaHIP graph partitioner to balanced partitions. Afterwards, we built an algorithm to map these graphs onto the 2D mesh of quantum cores by converting the problem into a Quadratic Assignment Problem with Fixed Assignment (QAPFA) to minimize the routing of leftover two-qubit gates between cores and the total travel of magic states from the magic state factory. Following this stage, the gates are scheduled using an algorithm that takes care of the timing of the gate set. As a final stage, our framework reports detailed statistics such as the number of classical communications, the number of EPR pairs and magic states consumed, and timing overheads for pre- and post- processing for inter-core state transfers. These results help to quantify both classical and quantum resources that are used in distributed logical quantum computing architectures.

Figures (15)

• Figure 1: Simple teleportation circuit
• Figure 2: Distance-3 Rotated Surface Code. Black circles are data qubits, blue circles are ancilla qubits. Red and white represent different stabilizer checks such as X and Z.
• Figure 3: Universal gate set operations that require lattice surgery. System uses (a) S and T gates, (b) CNOT gate, and (c) Hadamard gate. Pauli operations are done via software.
• Figure 4: Smooth teleportation protocol of a logical state
• Figure 5: Multi-core quantum architecture 10819534