Integrated emitters with CMOS-compatible tuning for large scale quantum SiN photonic circuits
Jasper De Witte, Atefeh Shadmani, Zhe Liu, Andraz Debevc, Tom Vandekerckhove, Marcus Albrechtsen, Rüdiger Schott, Arne Ludwig, Janez Krč, Gunther Roelkens, Leonardo Midolo, Bart Kuyken, Dries Van Thourhout
TL;DR
The paper tackles the challenge of scalable, low-loss quantum photonic integration by heterogeneously integrating InGaAs quantum dots embedded in GaAs nanobeams onto a CMOS-friendly SiN interposer using micro-transfer printing. The emitters reside in a p-i-n diode structure that enables Stark tuning and charge-noise suppression, preserving high purity and coherent emission. Key results include a printing yield of $94.7\%$, GaAs-SiN coupling of $82.2\%$, an exciton lifetime of $514\ \mathrm{ps}$, and a corrected single-photon purity of $g^{(2)}(0)=0.0572$ with minimal blinking ($<2.75\%$), tunable over about $1\ \mathrm{nm}$ with bias below $0.6\ \mathrm{V}$. Together, these findings demonstrate a scalable pathway toward co-integrating diverse quantum photonic components on a single, low-loss interposer chip, advancing practical quantum information processing architectures with CMOS-compatible control.
Abstract
Next-generation scalable quantum photonic technologies operating at the single photon level rely on bringing together optimized quantum building blocks with minimal optical coupling losses. Achieving this necessitates the heterogeneous integration of different elements onto a single interposer chip. Integrated quantum emitters are key enablers for generating single photons, inducing quantum nonlinearities, and producing entanglement. In this work, we demonstrate the scalable integration of mature InGaAs quantum dots embedded in GaAs waveguides onto a low-loss SiN photonic platform, as evidenced by a high processing yield of 94.7% using a commercially available micro-transfer printing tool. These integrated emitters are embedded within a p-i-n heterostructure that allows for noise suppression, near-blinking-free operation and wavelength tunability upon CMOS-level electrical biasing. With this, we pave the way for scalable integration of diverse quantum photonic devices on a single chip.
