Fabrication of A Dual Gated Mirror Symmetric Twisted Trilayer Graphene Device to Study Superconductivity

TL;DR

This work presents a detailed fabrication protocol for a dual-gated mirror-symmetric twisted trilayer graphene device, enabling in situ tuning of carrier density and displacement field to explore correlated states and superconductivity. The approach combines a seven-layer MSTTG stack with hBN dielectrics, graphite bottom gate, and gold top gate, assembled via stack-and-tear and finished with electron-beam lithography. Initial measurements on one device show gate-tunable resistance and a correlated insulating response at low temperature, but no superconductivity, likely due to residual twist-angle misalignment or gating non-idealities. The study provides a generalizable, high-tidelity workflow for fabricating complex 2D stacks and sets the stage for systematic exploration of superconductivity in TTG with improved device quality and gating control.

Abstract

Though research on graphene by itself has waned, the interest in moire materials, materials made with stacked layers of graphene with a rotational twist between the layers, has exploded in popularity. These layered devices show a key feature, flat bands. Flat bands localize electrons, which in turn leads to the expression of correlated states such as Mott insulators, superconductivity, and more. A key property of these devices is that their 2D nature allows us to tune them in situ, effectively allowing us to change the device's electronic properties. This powerful ability greatly reduces the time and money required to study superconductivity. The superconductivity in these systems seems to be similar to high-temperature superconductors such as cuprates, giving us a path towards studying high-temperature superconductivity. The fabrication of these devices is nontrivial, and thus we detail one general way to create these layered devices to give maximal tunability.

Figures (12)

• Figure 1: Schematic of the device structure. A) Side view of the device with materials labeled. B) Top view of the device with contacts labeled. C) Moire pattern emerging from the rotational misalignment of graphene layers.
• Figure 2: A) Schematic diagram of the preparation of the exfoliation tape. Preservation of the starting shape of the graphite crystal is attempted to maximize the size of the graphene. The graphite is spread out over the initial tape in the first two images. The third image depicts the tape after successive thinning operations. B) Photograph showing the final tape used for exfoliation. The density and thickness of the graphite are optimal for exfoliation. Scale bar is 1 cm. C) Example of a starting graphite crystal is shown. Scale bar is 1 cm.
• Figure 3: Optical microscope images of ideal and non-ideal graphene flakes and ideal top and bottom hBN. A) Ideal clean graphene flake with about 20 $\mu$m thickness and 100+ $\mu$m of length and no bulk graphite around it. Scale bar is 100 $\mu$m. B) Non-ideal graphene flake. Large and clean but connected to bulk. Scale bar is 10 $\mu$m. C) Ideal top hBN flake with a flat edge of length 70+ $\mu$m. Mostly clean and no cracks, and the right color/thickness. Scale bar is 10 $\mu$m. D) Ideal bottom hBN piece with clean surface and right thickness. Scale bar is 10 $\mu$m.
• Figure 4: Schematic and optical microscopy images of one iteration of the stack and tear process. A) PDMS stamp with PVA touching down on substrate with hBN, touchdown point is roughly 300 $\mu$m away from the edge of the hBN. Scale bar is 100 $\mu$m. B) Image of hBN on the stamp after lifting up from the substrate. Scale bar is 50 $\mu$m. C) Stamp touching down onto graphene flake. The purple outline shows graphene, and the dark yellow is the hBN flake in contact with the graphene flake. Lighter yellow is the stamp in contact with the substrate surface. Scale bar is 50 $\mu$m. D) hBN with graphene on the bottom side, outlined in green, on the stamp after lifting from the substrate. Scale bar is 50 $\mu$m.
• Figure 5: A) Stamp in contact with pre-patterned chip at 160 °C for transfer. Scale bar is 100 $\mu$m. B) Transferred stack on pre-patterned chip with twisted trilayer region (green outline) centered between four gold cross-shaped reference marks. Scale bar is 10 $\mu$m. C) Atomic Force Microscope image of the edge of the stack to determine the thickness of hBNs. The bottom hBN has a thickness of 77.5 nm $\pm$ 0.5 nm and the top hBN has a thickness of 85.6 nm $\pm$ 0.5nm. Bottom tick marks are 5 $\mu$m.