Unsupervised Graph Neural Network Framework for Balanced Multipatterning in Advanced Electronic Design Automation Layouts

TL;DR

This work addresses lithography-induced printing constraints by recasting multipatterning as a constrained graph coloring problem and solving it with an unsupervised GNN that generates initial colorings. A two-stage pipeline combines a GNN-based solver with refinement via a GNN heuristic, a CSP solver, and simulated annealing to minimize edge-conflict violations while balancing color usage across masks. Key contributions include the first unsupervised GNN for this EDA problem, a robust refinement framework, and extensive validation on proprietary Siemens data and OpenMPL benchmarks, demonstrating complete conflict-free decomposition and improved balance with data-efficient training. The approach offers a reproducible, low-cost baseline for scalable layout decomposition in EDA workflows, capable of adapting to complex domain constraints and providing fast, interpretable initial solutions for industry-scale designs.

Abstract

Multipatterning is an essential decomposition strategy in electronic design automation (EDA) that overcomes lithographic limitations when printing dense circuit layouts. Although heuristic-based backtracking and SAT solvers can address these challenges, they often struggle to simultaneously handle both complex constraints and secondary objectives. In this study, we present a hybrid workflow that casts multipatterning as a variant of a constrained graph coloring problem with the primary objective of minimizing feature violations and a secondary objective of balancing the number of features on each mask. Our pipeline integrates two main components: (1) A GNN-based agent, trained in an unsupervised manner to generate initial color predictions, which are refined by (2) refinement strategies (a GNN-based heuristic and simulated annealing) that together enhance solution quality and balance. Experimental evaluation in both proprietary data sets and publicly available open source layouts demonstrate complete conflict-free decomposition and consistent color balancing. The proposed framework provides a reproducible, data-efficient and deployable baseline for scalable layout decomposition in EDA workflows.

Figures (3)

• Figure 1: Comparison of valid and invalid graph colorings with varying balance. (Left:) A valid and balanced solution with partition sizes (3, 3, 2), where no adjacent nodes share the same color and the maximum partition size difference is 1. (Middle:) A valid but unbalanced solution with partition sizes (4, 2, 2), where the coloring constraint is satisfied but the maximum difference between partitions is 2. (Right:) An invalid but balanced solution with partition sizes (3, 2, 3) that achieves good balance but violates the graph coloring constraint. This illustrates the trade-off between satisfying hard constraints (valid coloring) and optimizing for balance.
• Figure 2: Methodology overview: for graph G, the coloring generation is divided into an initial solution (Step 4) and a refinement phase (Step 5).
• Figure 3: Graph representation showing predicted color probability distributions as pie charts for each node. Single-color pie charts denote confident model predictions, whereas multi-colored charts represent uncertain predictions. The GNN-heuristic approach utilizes these probability distributions to guide node color assignment decisions. Prediction uncertainty is demonstrated in nodes 5 and 11.