Hapax Locks : Value-Based Mutual Exclusion
Dave Dice, Alex Kogan
TL;DR
Hapax Locks introduce a value-based mutual exclusion mechanism that achieves FIFO admission and a constant-time doorway without requiring per-thread queue nodes or dynamic memory allocation. They allocate a unique hapax identity per acquire-release episode from a global block allocator, use a shared 4096-slot waiting array to reduce coherence traffic, and offer a visible-waiters variant for expedited handover, all while avoiding pointer migration and improving retrofit potential. Empirical results on ARMv8 and AMD platforms show Hapax Locks perform on par with state-of-the-art locks such as MCS, CLH, TWA, and HemLock, with advantages in integration simplicity and memory safety. The work also discusses trade-offs, including hash-collision risk in the waiting array and unbounded worst-case RMR under contention, while providing pathways for optimization and broader applicability across NUMA architectures and managed runtimes.
Abstract
We present Hapax Locks, a novel locking algorithm that is simple, enjoys constant-time arrival and unlock paths, provides FIFO admission order, and which is also space efficient and generates relatively little coherence traffic under contention in the common case. Hapax Locks offer performance (both latency and scalability) that is comparable with the best state of the art locks, while at the same time Hapax Locks impose fewer constraints and dependencies on the ambient runtime environment, making them particularly easy to integrate or retrofit into existing systems or under existing application programming interfaces Of particular note, no pointers shift or escape ownership between threads in our algorithm.