On the Excitability of Ultra-Low-Power CMOS Analog Spiking Neurons
Léopold Van Brandt, Grégoire Brandsteert, Denis Flandre
TL;DR
The paper investigates the excitability of an ultra-low-power CMOS analog spiking neuron using SPICE-based simulations with industrial transistor models. It shows that a membrane-potential threshold $V_{ m m,th}$ is intrinsic to the neuron, while the critical charge $ riangle Q_{ m th}(I_{ m ex})$ required to spike depends on the input stimulus, making it non-intrinsic. By introducing an effective nonlinear membrane capacitance $C_{ m m,eff}(t)$, the authors relate the threshold charge to the voltage threshold via $ riangle Q_{ m th} = ar{C}_{ m m,eff} riangle V_{ m m,th}$ and analyze the neuron’s dynamics in a 2D state space $(v_{ m m}, v_{ m GNA})$, including a separatrix that governs spike initiation and an always-spiking limit cycle under sustained drive. The work demonstrates how a biologically-inspired integrate-and-fire-like response emerges in a compact, low-power circuit and lays the groundwork for future studies on noise and jitter in neuromorphic hardware.
Abstract
The excitability property of spiking neurons describes their capability to output an action potential as a real-time response to an input synaptic excitation current and is central to the event-based neuromorphic computing paradigm. The spiking mechanism is analysed in a representative ultra-low-power analog neuron from the circuit literature. Relying on conventional SPICE simulations compatible with industrial transistor compact models, we establish a excitation criterion, quantified either in terms of critical supplied charge or membrane potential threshold. Only the latter is found intrinsic to the neuron, i.e. independent of the input stimulus. Rigorous analysis of the nonlinear neuron dynamics provides insight but still needs to be explored further, as well as the effect of the intrinsic noise.
