Assessing Finite Scalability in Early Fault-Tolerant Quantum Computing for Homogeneous Catalysts

TL;DR

The paper addresses how finite scalability constrains EFTQC-based quantum simulations of open-shell catalysts using QPE. It combines two hardware archetypes (high-fidelity slow vs high-speed low-fidelity) with two scalability models (power-law and logarithmic) and compares surface-code and LDPC fault-tolerance schemes, reporting resources via space-time volume. The key findings show that finite scalability increases physical qubits and runtimes but does not alter scaling trends, with high-fidelity architectures requiring lower minimum scalability to solve comparable problems; LDPC codes further improve competitiveness by reducing space-time overhead. Collectively, the work demonstrates that scalable, code-aware hardware design, rather than idealized infinite scalability, is essential for advancing practical quantum chemistry on EFTQC platforms and guides strategic choices in hardware and error correction for early fault-tolerant quantum systems.

Abstract

As quantum hardware advances toward fault-tolerant operation, an intermediate stage known as early fault-tolerant quantum computing (EFTQC) is emerging, where partial error correction enables meaningful computation. In this regime, the ability of quantum processors to scale in size and depth has become a crucial factor shaping their achievable performance. This study investigates how finite scalability influences resource requirements for simulating open-shell catalytic systems using Quantum Phase Estimation (QPE). The analysis compares hardware archetypes distinguished by fidelity or operation speed under two representative scalability models. Finite scalability increases qubit and runtime demands yet leaves overall scaling behavior intact, with high-fidelity architectures requiring lower minimum scalability to solve equally sized problems. These effects are largely independent of the chosen scalability model. Extending this framework, we examine runtime competitiveness across hardware and code configurations, incorporating surface-code and quantum Low-Density Parity-Check (LDPC)-based fault tolerance under finite scalability. The results identify operating regimes where high-fidelity architectures remain competitive despite slower gate speeds and show that LDPC codes further expand this regime by reducing space-time overhead. Together, these findings highlight the central role of scalability in quantifying performance and guiding the design of next-generation quantum hardware. Continued progress in scalable architectures will be essential for extending quantum computing to increasingly complex scientific and industrial applications.

Figures (6)

• Figure 1: Schematic of a transversal two-qubit gate between logical qubits. The left panel shows a logical CNOT gate acting between $\ket{\psi_1}$ and $\ket{\psi_2}$, while the right panel illustrates its transversal implementation across the corresponding physical qubits that comprise each logical qubit.
• Figure 2: The effect of introducing scalability on physical qubit and runtime requirements for catalysis instances. Round dots represent the power law model defined in \ref{['eq:scalability_power_law']}, while triangular dots correspond to the logarithmic model defined in \ref{['eq:scalability_logarithmic']}.
• Figure 3: The effect of introducing scalability on the space-time volume for catalysis instances. Different colors represent systems of varying sizes. Missing data points in subplots (b) and (d) indicate cases where type B devices failed, as the scalability value corresponding to that system size was below the minimum scalability requirement.
• Figure 4: The minimum scalability ratio (purple dots) between type B ($s_{B}$) and type A ($s_{A}$) hardware architectures for the catalysis instances, highlighted with green and blue triangles for the lowest and highest ratios, respectively.
• Figure 5: The ratio of qubits required for type A hardware to achieve competitive runtime with type B hardware. The x-axis represents the scalability of type B qubits, while the y-axis represents the scalability of type A qubits. The color gradient in the plot represents the ratio of type A logical qubits ($k_{A}$) to type B logical qubits ($k_{B}$), indicating the level where competitiveness is achieved. The green and blue lines indicate the highest and lowest scalability ratios found for the catalysis instances.