Multibit Ferroelectric Memcapacitor for Non-volatile Analogue Memory and Reconfigurable Filtering

Abstract

Tuneable capacitors are vital for adaptive and reconfigurable electronics, yet existing approaches require continuous bias or mechanical actuation. Here we demonstrate a voltage-programmable ferroelectric memcapacitor based on HfZrO that achieves more than eight stable, reprogrammable capacitance states (3-bit encoding) within a non-volatile window of 24~pF. The device switches at low voltages (3~V), with each state exhibiting long retention (10^5~s) and high endurance (10^6 cycles), ensuring reliable multi-level operation. At the nanoscale, multistate charge retention was directly visualised using atomic force microscopy, confirming the robustness of individual states beyond macroscopic measurements. As a proof of concept, the capacitor was integrated into a high-pass filter, where the programmed capacitive states shift the cutoff frequency over 5~kHz, establishing circuit-level viability. This work demonstrates the feasibility of CMOS-compatible, non-volatile, analogue memory based on ferroelectric HfZrO, paving the way for adaptive RF filters, reconfigurable analogue front-ends, and neuromorphic electronics.

Figures (5)

• Figure 1: Device structure and film characterisation. (a) Wafer schematic showing 32 standalone TiN/HfZrO/TiN capacitors, where the HfZrO layer is deposited by atomic layer deposition using alternating Hf and Zr precursors. Also, a SEM top view of an individual device highlights the electrode geometry and film uniformity. (b) Glancing angle XRD patterns for HZO on SiO$_x$, HZO on bottom TiN, and TiN/HZO/TiN stacks reveal a distinct orthorhombic phase peak near 30.5$^\circ$ that strengthens with TiN electrodes, indicating improved crystallinity and phase stabilisation. (c-e) XPS spectra of annealed HZO films show the expected Hf 4f and Zr 3d doublets and O 1s features, confirming correct cation valence and limited defect contributions. Together, these measurements verify the structural and chemical quality of the ferroelectric HZO layer.
• Figure 2: Nanoscale evidence of multistate charge programmability. (a) PFM phase mapping of the HZO film after box-in-box writing with $+3.5$ V and $-4$ V, revealing domain-level contrast. (b) The corresponding statistical distribution of piezoelectric response separates the written regions from the background, confirming two stable polarisation states despite low visual contrast. (c–d) EFM mapping of the same region shows stronger charge contrast and well-separated electrostatic charge regions in the statistical distribution. (e–f) EFM mapping of three states ($+3.5$, $+1.5$, and $-4$ V) demonstrates nanoscale multistate programmability. (g) Three-dimensional surface with EFM overlay. (h) The topography profile along the white dashed line in (g) shows a flat surface with RMS roughness $\sim$0.9 nm and no correlation with electrical contrast. (i) EFM line profile along the same line shows three distinct charge plateaus.
• Figure 3: Binary switching and material stack optimisation.(a) Schematic illustration of domain alignment required for polarisation using triangular pulses, associated double-well energy landscape, P-V and capacitance states. (b) P–V hysteresis of HZO shows progressive wake-up and stabilisation of remanent polarisation. (c) C–V loops from the same device display a butterfly shape with a 17 pF memory window and asymmetric coercive points, with an inset showing the two stable capacitance states. (d–f) Comparison of HZO, HZO-MS, and HZO-Al capacitors: (d) P–V loops reveal enhanced polarisation in HZO-MS and suppression in HZO-Al, (e) C–V shows an expanded window in HZO-MS, while (f) endurance measurements demonstrate improved cycling stability in HZO-MS. These results identify HZO-MS as the optimised stack for subsequent multistate studies.
• Figure 4: Multistate tuneable memcapacitor. (a) Triangular voltage pulses of increasing amplitude (colour-coded) progressively orient the dipoles, tilting the Landau double-well energy landscape as predicted by theory. The corresponding $P$–$V$ and $C$–$t$ schematics highlight how intermediate polarisation states map onto multiple stable capacitance states. (b–f) Experimental results on HZO-MS devices. (b) polarisation–voltage loops under increasing amplitude, revealing quasi-stable intermediate configurations. (c) Bidirectional capacitive switching dynamics showing asymmetric potentiation and depression. (d) Retention of five capacitance states over 6 h. (e) Evolution of capacitance under repeated programming at fixed bias. (f) Statistical distribution of capacitance values versus programming voltage, with variability highest in mid-window states.
• Figure 5: Tuneable high-pass filtering with ferroelectric memcapacitor. (a) Packaged HZO-MS capacitor integrated on a PCB, together with the equivalent RC circuit and the five programmable capacitance states ($C_1$–$C_5$). A small systematic offset of $\sim$5 pF is observed between wafer-scale and packaged devices, attributed to parasitic contributions. (b) Measured filter response compared to the ideal RC model. The reduced cutoff frequency and depressed pass-band gain indicate the presence of an additional series resistance $R_S$. (c) Magnified view near the cutoff region showing five clearly separated frequency responses, each corresponding to a distinct capacitance state. (d) Extracted cutoff frequency as a function of programmed capacitance.