Cryogenic UV detection using stress-engineered zero-bias ZnO-thin film based Piezo-Photonic detector

TL;DR

This work demonstrates a zero-bias UV detector based on stress-engineered ZnO thin films that harness a piezoelectric field generated by interfacial stress to drive photocarrier transport without external bias. By comparing planar ZnO MSM devices (Sample I) with pillar-assisted ZnO/Si3N4 MSM devices (Sample II), the study shows that Si3N4 pillars induce higher residual stress, correlating with stronger UV signals at both room and cryogenic temperatures. GIXRD confirms a ~40% increase in residual stress for Sample II, consistent with faster rise times and higher signal amplitudes observed in room-temperature tests and with improved SNR at cryogenic temperatures. The results highlight stress engineering as a practical route to bias-free UV detection in extreme environments, with potential applications in cryogenic noble-element detectors and space-based systems.

Abstract

We demonstrate a zero-bias ultraviolet (UV) detector using zinc oxide (ZnO) thin films as the active semiconductor layer, specifically for application in cryogenic conditions. The zero-bias device utilizes the piezoelectric potential developed through interfacial stress in the active semiconductor layer for charge transport. We explored two vertically stacked metal-semiconductor-metal (MSM) configurations: Sample I, a device comprised of chromium (Cr)/ZnO/Cr layers, and Sample II, a ZnO-silicon nitride (Si3N4) device comprised of Cr/Si3N4/ZnO/Cr layers. The Si3N4 layer in Sample II was introduced in the form of pillars, with the aim of increasing the residual stress in the active region. These fabricated devices were tested at both room and cryogenic temperatures to characterize their UV-detection performance in a custom test stand using a 365 nm UV LED source. We observe a higher UV-induced voltage signal for Sample II in comparison to Sample I at both temperature regimes. Grazing-incidence X-ray diffraction (GIXRD) measurements showed approximately 40% higher residual stress in Sample II than in Sample I. A higher residual stress suggests a higher induced piezopotential in Sample II, explaining the enhancement in the UV-induced signal. Our results demonstrate that through appropriate in-device stress engineering, UV photoinduced signals can be enhanced, increasing detector sensitivity. A zero-bias photodetector with in-device stress engineering, as demonstrated here, can have applications in extreme environments, like cryogenic liquid noble elements or high radiation space environments, where low or zero-power detection may be required.

Figures (16)

• Figure 1: (a), (b) Schematic showing the cross-sectional representation of a semi-vertical planar ZnO thin film (Sample I) and a semi-vertical heterostructure incorporating Si3N4 pillars designed to introduce localized interfacial stress (Sample II) (note: the diagrams are not to scale) grown on an intrinsic Si substrate. For the purposes of this study, four pillars of Si3N4 are grown underneath the layer of ZnO to induce in-device stress due to lattice mismatch. (c), (d) show images of the actual fabricated devices.
• Figure 2: The cross-sectional SEM images of the ZnO–Si3N4/Cr/Si stack are shown in (a) and (b). (a) The overall stack shows the bottom Cr layer and the ZnO–Si3N4 bilayer. (b) A zoomed-in view resolves the distinct ZnO and Si3N4 layers. (c) and (d) show representative FeSEM scans for Samples I and I,I respectively.
• Figure 3: 3D cross-sectional CAD image of the in-house, custom-designed experimental setup operating under cryogenic temperatures and vacuum conditions. The setup is employed for the UV-induced testing of the fabricated devices.
• Figure 4: 3D model showing the positions of the three RTDs used to calibrate the temperature during a cryogenic cycle: (a) behind the copper block, (b) in front of the copper but behind the PCB, and (c) LT Spice schematic of the RTD readout circuit
• Figure 5: The temperature calibration curve is shown for the RTDs placed behind the copper block and another infront of it.