Power Hardware-in-the-loop Interfacing via $\mathcal{H}_\infty$ Model Matching

TL;DR

The paper tackles the PHIL interfacing problem by casting it as a model-matching $\mathcal{H}_\infty$ control problem with transparency as the control objective, enabling the use of full interconnection dynamics. It formalizes the generalized plant and controller framework, derives discrete-time models for ROS and DUT, and develops a delay-aware, normalized design workflow to synthesize a controller $\mbf{K}$ that achieves low $\mathcal{H}_\infty$ gain in the target bands. Experimental validation on an OPAL-RT PHIL bench demonstrates that the proposed approach yields accuracy comparable or superior to an ITM-based interface, with robust stability across a wide range of short-circuit ratios, particularly at nominal conditions. The work provides a principled, information-rich methodology for PHIL interface design, enabling reliable real-time testing of grid-DUT interactions, while acknowledging that robustness considerations remain for future study.

Abstract

This paper presents an $\mathcal{H}_\infty$ model matching control-based approach to the problem of power hardware-in-the-loop (PHIL) interfacing. The objective is to interconnect a grid simulation and a physical device via an interface in a way that is stable and accurate. Conventional approaches include the ideal transformer method (ITM) and its impedance-based variants, which trade accuracy for stability, as well as some $\mathcal{H}_\infty$ control-based approaches, which do not make use of all the available information in their optimization for accuracy. Designing for transparency, as opposed to accuracy as existing approaches do, would achieve both accuracy and stability, while making use of all the dynamical information present in the idealized interconnection of the grid and device. The approach proposed in this paper employs model matching to formulate the PHIL problem as an $\mathcal{H}_\infty$ control problem using transparency as the explicit frequency-domain control objective. The approach is experimentally validated in a real-time resistive-load PHIL setup, and is found to achieve accuracy levels that are comparable or superior to those of an ITM-based interface.

Figures (6)

• Figure 1: PHIL interfacing problem and its components.
• Figure 2: PHIL experimental results.
• Figure 3: Generalized plant and controller.
• Figure 4: Generalized plant of the model matching control architecture, where $\mbf{z}(t) := [\mbf{e}(t)\; \mbf{u}(t)]^{\mathsf{T}}$ and $\mbf{y}(t) := \mbf{y}_c(t)$.
• Figure 5: Illustration of the delay structure inherent to the experiment reported in this paper. The incoming and outgoing channels of $\mbf{K}$ are the measurement and actuation channels, respectively. The delay in the ROS actuation channel is inserted to prevent algebraic-loop issues in the real-time simulation.