CNN-Based Automated Parameter Extraction Framework for Modeling Memristive Devices

TL;DR

The paper tackles the challenge of extracting compact-model parameters for memristive RRAM devices, which is traditionally manual and time-consuming due to nontrivial links between parameters and measurable metrics. It introduces a hybrid approach that first uses a CNN to generate initial parameter estimates from device I–V images (and oxide thickness), then refines those estimates with three adaptive binary-search heuristic blocks aimed at matching key NVM metrics: $V_{\text{set}}$, $V_{\text{reset}}$, the LRS slope, and hysteresis area. The framework is trained on a large synthetic dataset and validated across Stanford-model benchmarks, alternative analytical models (VTEAM, Yakopcic), and experimental data, showing fast convergence and competitive accuracy while highlighting model-limited deviations for device-specific artifacts. This method promises to accelerate RRAM modeling by reducing manual tuning and enabling easier adaptation to various devices and compact models.

Abstract

Resistive random access memory (RRAM) is a promising candidate for next-generation nonvolatile memory (NVM) and in-memory computing applications. Compact models are essential for analyzing the circuit and system-level performance of experimental RRAM devices. However, most existing RRAM compact models rely on multiple fitting parameters to reproduce the device I-V characteristics, and in most cases, as the parameters are not directly related to measurable quantities, their extraction requires extensive manual tuning, making the process time-consuming and limiting adaptability across different devices. This work presents an automated framework for extracting the fitting parameters of the widely used Stanford RRAM model directly from the device I-V characteristics. The framework employs a convolutional neural network (CNN) trained on a synthetic dataset to generate initial parameter estimates, which are then refined through three heuristic optimization blocks that minimize errors via adaptive binary search in the parameter space. We evaluated the framework using four key NVM metrics: set voltage, reset voltage, hysteresis loop area, and low resistance state (LRS) slope. Benchmarking against RRAM device characteristics derived from previously reported Stanford model fits, other analytical models, and experimental data shows that the framework achieves low error across diverse device characteristics, offering a fast, reliable, and robust solution for RRAM modeling.

Figures (15)

• Figure 1: Proposed automated parameter extraction framework for Stanford RRAM model consists of a CNN block followed by three sequential heuristic blocks. The CNN block processes an RGB image of RRAM I-V characteristics along with oxide thickness to generate an initial parameter fit. The first heuristic block optimizes parameters $\beta$ and $\gamma_{0}$ to match set/reset reference voltages and scales the I-V curve. The second heuristic block adjusts parameter $V_0$ to match the reference LRS slope. The third heuristic block tunes parameter $g_0$ to match the reference hysteresis area. The framework outputs optimized Stanford RRAM model fitting parameters after the complete processing sequence.
• Figure 2: Representative synthetic I-V curves for RRAM devices under different parameter configurations. The dataset was generated through systematic perturbation of fitting parameters.
• Figure 3: Convolutional neural network architecture for initial parameter estimation. The model employs a pretrained ResNet-50v2 backbone, with modifications to the CNN block for RRAM parameter fitting.
• Figure 4: Key metrics extraction from device I-V curve: (a) Highlights $V_{\text{set}}$ and $V_{\text{reset}}$ (b) LRS slope in the reset region, (c) Area enclosed by the LRS region, and (d) Area enclosed by the HRS region.
• Figure 5: Effect of fitting parameter variation on RRAM I-V Characteristics: (a) Increasing $\gamma_0$ reduces the reset voltage($V_{\text{reset}}$), (b) increasing $\beta$ elevates the set voltage ($V_{\text{set}}$), (c) $V_0$ modulates the switching dynamics as reflected in the LRS slope, and (d) $g_0$ controls the hysteresis loop area ($A$ and $A_{\text{min}}$).