Design and Optimization of Mixed-Kernel Mixed-Signal SVMs for Flexible Electronics

TL;DR

This work tackles the challenge of running ML classifiers on flexible electronics under strict area and power constraints by introducing a mixed-kernel, mixed-signal SVM that combines digital linear classifiers with analog RBF blocks. A separation-driven training workflow assigns OvO binary classifiers to the most appropriate kernel type to maximize accuracy while minimizing the number of costly RBF units. The proposed architecture delivers an average of 7.7% higher accuracy than single-kernel linear SVM baselines and achieves up to 108x area and 17x power reductions compared to digital all-RBF implementations, validating the practicality of FE-scale hardware intelligence. The combination of analog RBF units with digital linear processing, together with an encoder-based multiclass decision, enables efficient, scalable ML inference in flexible electronics.

Abstract

Flexible Electronics (FE) have emerged as a promising alternative to silicon-based technologies, offering on-demand low-cost fabrication, conformality, and sustainability. However, their large feature sizes severely limit integration density, imposing strict area and power constraints, thus prohibiting the realization of Machine Learning (ML) circuits, which can significantly enhance the capabilities of relevant near-sensor applications. Support Vector Machines (SVMs) offer high accuracy in such applications at relatively low computational complexity, satisfying FE technologies' constraints. Existing SVM designs rely solely on linear or Radial Basis Function (RBF) kernels, forcing a trade-off between hardware costs and accuracy. Linear kernels, implemented digitally, minimize overhead but sacrifice performance, while the more accurate RBF kernels are prohibitively large in digital, and their analog realization contains inherent functional approximation. In this work, we propose the first mixed-kernel and mixed-signal SVM design in FE, which unifies the advantages of both implementations and balances the cost/accuracy trade-off. To that end, we introduce a co-optimization approach that trains our mixed-kernel SVMs and maps binary SVM classifiers to the appropriate kernel (linear/RBF) and domain (digital/analog), aiming to maximize accuracy whilst reducing the number of costly RBF classifiers. Our designs deliver 7.7% higher accuracy than state-of-the-art single-kernel linear SVMs, and reduce area and power by 108x and 17x on average compared to digital RBF implementations.

Figures (5)

• Figure 1: Overview of the proposed mixed-kernel, mixed-signal SVM for three classes: RBF classifiers are realized in analog, while linear classifiers and decision logic are in digital.
• Figure 2: Analog RBF classifier architecture: a hardware Gaussian kernel forms a separable product across dimensions; outputs are weighted by $\alpha$ and routed by the sign $y$, then differentially accumulated across support vectors.
• Figure 3: Datapath of an 8-input linear SVM: weighted inputs are summed with bias, and the sign determines the output.
• Figure 4: Analog RBF validation: (a) SPICE vs. ideal metrics and (b) Gaussian kernel comparison.
• Figure 5: Normalized area and power breakdown between analog/digital in our mixed-signal SVMs of \ref{['tab:acc_area_power_comp']}.