Zero-Noise Extrapolation via Cyclic Permutations of Quantum Circuit Layouts

TL;DR

This work tackles error mitigation on NISQ devices by exploiting inhomogeneous gate fidelities through Cyclic Layout Permutation-based Zero Noise Extrapolation (CLP-ZNE). It builds a multi-channel noise model with a linear expansion and proves that averaging noisy observables over cyclic layouts in a 1D topology yields an unbiased estimate of the noiseless value, $E_{\text{mit}}=E_0+O(q^2)$, using only $O(n)$ layouts (extensible to $O(n^2)$ for general connectivity). Numerical experiments with IBM Torino-like noise and benchmarks such as random Sherrington-Kirkpatrick instances and a transverse-field Ising model show substantial error suppression (typically by factors of $8$–$13$, and up to orders of magnitude in depolarizing-dominated cases), and robustness to strong non-unital noise via multilinear extrapolation. The method does not require extra quantum gates and remains practical under realistic shot-noise conditions, though SPAM and measurement noise are acknowledged as limitations to be mitigated in combination with SPAM-error mitigation techniques. Overall, CLP-ZNE provides a provable, scalable approach to mitigating noise on contemporary quantum processors by leveraging layout-level error inhomogeneity.

Abstract

Increasing the utility of currently available Noisy Intermediate-Scale Quantum (NISQ) devices requires developing efficient methods to mitigate hardware errors, taking into account the constraints of these devices such as medium number of qubits and limited connectivity between them. In this work we propose a novel Cyclic Layout Permutations based Zero Noise Extrapolation (CLP-ZNE) protocol for such a task. The method leverages the inherent non-uniformity of gate errors in NISQ hardware and exploits symmetries of quantum circuits with one-dimensional connectivity to extrapolate the expectation value, averaged over cyclic circuit layout permutations, to the level of zero noise. In contrast to the previous layout permutation based approaches, for $n$ qubit circuit CLP-ZNE requires measurements of only $O(n)$ different circuit layouts to reconstruct the noiseless expected value. When benchmarked against noise channels modeling the IBM Torino quantum computer, the method reduces a typical expectation value error by an order of magnitude, depending on the protocol specifications. By employing a noise model derived from real hardware specifications, including both depolarizing and $T_1/T_2$ relaxation processes, these results give evidence for the applicability of CLP-ZNE to present-day NISQ processors.

Figures (5)

• Figure 1: Schematic illustration of the proposed CLP-ZNE protocol for a four-qubit circuit with a single noise operator ($d = 1$). Circles represent physical qubits, while edges indicate available two-qubit couplings, color-coded according to their error rates. The procedure begins by selecting two circuit layouts, $l_1$ and $l_2$, such that their total error rates are different. Abstract circuit qubits, labeled 1–4, are then mapped onto physical qubits according to each layout. Subsequently, cyclically permuted layout sets $\mathcal{C}(l_1)$ and $\mathcal{C}(l_2)$ are generated. For each layout within these sets, both the observable expectation value and the total error rate are computed and averaged over the respective sets. Finally, a linear regression is performed over the averaged values to extrapolate to the zero-noise limit, yielding the mitigated expectation value $E_{\mathrm{mit}}$.
• Figure 2: The distributions of errors before and after the mitigation for (a) noise model derived from IBM Torino QPU calibration data, (b) analogous noise model, where each $T_1$, $T_2$ is reduced by a factor of 10 and (c) multiparameter extrapolation over 4 cycles for the same noise settings as in case (b). The blue distribution is obtained from the cycle with the lowest total infidelity $\mathcal{C}_1$, while the red is from a cycle with approximately double the infidelity. The values of $\sigma$ represent standard deviations of the corresponding distributions. On each panel the distribution are normalize to the same height to facilitate visual comparison.
• Figure 3: A typical example of CLP-ZNE for one of the instances considered in figure \ref{['fig:histograms']} (a). The points are obtained from finite statistics of $10^4$ shots used for every layout and measurement basis. The error bars on the noisy data denote the standard deviation, centered at the true average (black points). The error bars on the extrapolated value denote the standard deviation of $E_{mit}$, induced by the shot noise.
• Figure 4: CLP-ZNE realization for rescaled amplitude damping noise for 12 qubit VQE circuit. Different clusters of points depict noisy expectation values, with darker colors corresponding to noisier circuits. Solid horizontal line depicts the noiseless VQE energy, while the dashed lines are elevated by the energies of lowest excitations of $H_I$. Inset: same plot in the range of small circuit errors.
• Figure 5: Noisy and mitigated energies obtained for different circuit error sums $2p\sum_i\gamma_i$ by rescaling the strengths $\gamma_i$. Solid horizontal line depict noiseless VQE energy, while the dashed lines are elevated by the energies of lowest excitations of $H_I$.

Theorems & Definitions (1)

• proof