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Rapid Inference of Logic Gate Neural Networks for Anomaly Detection in High Energy Physics

Lino Gerlach, Elliott Kauffman, Liv Helen Våge, Isobel Ojalvo

TL;DR

The paper addresses the need for fast, low-latency anomaly detection in the CMS Level-1 Trigger under HL-LHC data rates. It develops and publicizes Convolutional Differentiable Logic Gate Networks (CLGN), trained with differentiable gate mixtures and deployed as a low-latency, binary inference model for calorimeter-like data. By placing CLGN in the CICADA teacher-student framework and evaluating on CMS Open Data, the authors show competitive physics performance and improved outlier discrimination over quantized baselines, with ultra-low FPGA latency and zero DSP usage. This work demonstrates the practicality of logic-gate networks for on-detector inference, enabling efficient, hardware-friendly A.I. in high-energy physics and beyond.

Abstract

The increasing data rates and complexity of detectors at the Large Hadron Collider (LHC) necessitate fast and efficient machine learning models, particularly for rapid selection of what data to store, known as triggering. Building on recent work in differentiable logic gates, we present a public implementation of a Convolutional Differentiable Logic Gate Neural Network (CLGN). We apply this to detecting anomalies at the Level-1 Trigger at CMS using public data from the CICADA project. We demonstrate that the CLGN achieves physics performance on par with or superior to conventional quantized neural networks. We also synthesize an LGN for a Field-Programmable Gate Array (FPGA) and show highly promising FPGA characteristics, notably zero Digital Signal Processor (DSP) resource usage. This work highlights the potential of logic gate networks for high-speed, on-detector inference in High Energy Physics and beyond.

Rapid Inference of Logic Gate Neural Networks for Anomaly Detection in High Energy Physics

TL;DR

The paper addresses the need for fast, low-latency anomaly detection in the CMS Level-1 Trigger under HL-LHC data rates. It develops and publicizes Convolutional Differentiable Logic Gate Networks (CLGN), trained with differentiable gate mixtures and deployed as a low-latency, binary inference model for calorimeter-like data. By placing CLGN in the CICADA teacher-student framework and evaluating on CMS Open Data, the authors show competitive physics performance and improved outlier discrimination over quantized baselines, with ultra-low FPGA latency and zero DSP usage. This work demonstrates the practicality of logic-gate networks for on-detector inference, enabling efficient, hardware-friendly A.I. in high-energy physics and beyond.

Abstract

The increasing data rates and complexity of detectors at the Large Hadron Collider (LHC) necessitate fast and efficient machine learning models, particularly for rapid selection of what data to store, known as triggering. Building on recent work in differentiable logic gates, we present a public implementation of a Convolutional Differentiable Logic Gate Neural Network (CLGN). We apply this to detecting anomalies at the Level-1 Trigger at CMS using public data from the CICADA project. We demonstrate that the CLGN achieves physics performance on par with or superior to conventional quantized neural networks. We also synthesize an LGN for a Field-Programmable Gate Array (FPGA) and show highly promising FPGA characteristics, notably zero Digital Signal Processor (DSP) resource usage. This work highlights the potential of logic gate networks for high-speed, on-detector inference in High Energy Physics and beyond.

Paper Structure

This paper contains 7 sections, 1 equation, 2 figures, 1 table.

Figures (2)

  • Figure 1: Performance of a CLGN compared to the teacher model and a quantized non-LGN implementation.
  • Figure 2: The FPGA resource utilisation of our LGN implementation compared to a quantized network (QKeras) and a High Granularity Quantized implementation. HGQ-1E-4, HGQ1E-5 and HGQ-mixed refer to a specific hyperparameter in the granularization process, see linoNeurips for more details. EDM denotes the earth mover distance. The resource utilization on the x-axis, while somewhat arbitrary, is a common metric for FPGA utilization.