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PEARL: Power- and Energy-Aware Multicore Intermittent Computing

Khakim Akhunov, Eren Yildiz, Kasim Sinan Yildirim

TL;DR

PEARL enables efficient multicore intermittent computing on batteryless, power-harvesting MCUs by coupling a three-threshold voltage tracking circuit and an external SPI-based FRAM for backups with SRAM-based computation and a lightweight, energy-aware runtime. It dynamically adapts between single-core and dual-core execution using an EWMA-based ambient-power predictor, avoiding unnecessary backups and exploiting available energy to maximize throughput. Across simulations and a MAX32666-based testbed, PEARL achieves up to 30x performance improvements and up to 32x energy reductions compared with state-of-the-art intermittent multicore solutions, with adaptation reducing latency by up to ~31% and increasing MAC throughput by up to ~94%. The approach enables practical batteryless multicore inference and sensing on existing MCUs and is released as open source for community adoption.

Abstract

Low-power multicore platforms are suitable for running data-intensive tasks in parallel, but they are highly inefficient for computing on intermittent power. In this work, we present PEARL (PowEr And eneRgy-aware MuLticore Intermittent Computing), a novel systems support that can make existing multicore microcontroller (MCU) platforms suitable for efficient intermittent computing. PEARL achieves this by leveraging only a three-threshold voltage tracking circuit and an external fast non-volatile memory, which multicore MCUs can smoothly interface. PEARL software runtime manages these components and performs energy- and power-aware adaptation of the multicore configuration to introduce minimal backup overheads and boost performance. Our evaluation shows that PEARL outperforms the state-of-the-art solutions by up to 30x and consumes up to 32x less energy.

PEARL: Power- and Energy-Aware Multicore Intermittent Computing

TL;DR

PEARL enables efficient multicore intermittent computing on batteryless, power-harvesting MCUs by coupling a three-threshold voltage tracking circuit and an external SPI-based FRAM for backups with SRAM-based computation and a lightweight, energy-aware runtime. It dynamically adapts between single-core and dual-core execution using an EWMA-based ambient-power predictor, avoiding unnecessary backups and exploiting available energy to maximize throughput. Across simulations and a MAX32666-based testbed, PEARL achieves up to 30x performance improvements and up to 32x energy reductions compared with state-of-the-art intermittent multicore solutions, with adaptation reducing latency by up to ~31% and increasing MAC throughput by up to ~94%. The approach enables practical batteryless multicore inference and sensing on existing MCUs and is released as open source for community adoption.

Abstract

Low-power multicore platforms are suitable for running data-intensive tasks in parallel, but they are highly inefficient for computing on intermittent power. In this work, we present PEARL (PowEr And eneRgy-aware MuLticore Intermittent Computing), a novel systems support that can make existing multicore microcontroller (MCU) platforms suitable for efficient intermittent computing. PEARL achieves this by leveraging only a three-threshold voltage tracking circuit and an external fast non-volatile memory, which multicore MCUs can smoothly interface. PEARL software runtime manages these components and performs energy- and power-aware adaptation of the multicore configuration to introduce minimal backup overheads and boost performance. Our evaluation shows that PEARL outperforms the state-of-the-art solutions by up to 30x and consumes up to 32x less energy.

Paper Structure

This paper contains 33 sections, 10 equations, 10 figures, 6 tables.

Table of Contents

  1. Introduction
  2. Boosting Intermittent Computing
  3. Need for Multicore Intermittent Computing
  4. Prior Art Limitations
  5. Our Novelties and Differences
  6. PEARL: System Design
  7. Optimizing Memory Accesses
  8. Low Power Memory Retention Mode (LPMRM).
  9. Defining Thresholds.
  10. SRAM Retention.
  11. Checkpoints.
  12. Power-Aware Architectural Scaling
  13. Algorithm Overview.
  14. Algorithm Description.
  15. How it Works.
  16. ...and 18 more sections

Figures (10)

  • Figure 1: PEARL energy level monitoring strategy.
  • Figure 2: The example of execution flow and power level prediction.
  • Figure 3: FSM of the PEARL computational flow.
  • Figure 4: PEARL software library code example.
  • Figure 5: Real hardware evaluation setup.
  • ...and 5 more figures