PDA-LSTM: Knowledge-driven page data arrangement based on LSTM for LCM supression in QLC 3D NAND flash memories

TL;DR

The paper tackles LCM-induced reliability issues in QLC 3D NAND by treating intra-page data arrangement as a physics-informed sequence generation task. It introduces PDA-LSTM, a long-short term memory model that outputs a non-repetitive data-placement probability matrix guided by a LCM evaluation score, enabling data mapping without extra flag bits during inference. Empirical results show substantial BER reductions (up to ~80% on average over unarranged data and improvements over WBVM/DVDS at code-length 64) and notable SSD read/write performance gains, validating the method's practicality. The approach offers a hardware-friendly path to enhance data retention and reliability in high-density NAND flash, with potential applicability to real-world data types beyond synthetic sequences.

Abstract

Quarter level cell (QLC) 3D NAND flash memory is emerging as the predominant storage solution in the era of artificial intelligence. QLC 3D NAND flash stores 4 bit per cell to expand the storage density, resulting in narrower read margins. Constrained to read margins, QLC always suffers from lateral charge migration (LCM), which caused by non-uniform charge density across adjacent memory cells. To suppress charge density gap between cells, there are some algorithm in form of intra-page data mapping such as WBVM, DVDS. However, we observe inter-page data arrangements also approach the suppression. Thus, we proposed an intelligent model PDA-LSTM to arrange intra-page data for LCM suppression, which is a physics-knowledge-driven neural network model. PDA-LSTM applies a long-short term memory (LSTM) neural network to compute a data arrangement probability matrix from input page data pattern. The arrangement is to minimize the global impacts derived from the LCM among wordlines. Since each page data can be arranged only once, we design a transformation from output matrix of LSTM network to non-repetitive sequence generation probability matrix to assist training process. The arranged data pattern can decrease the bit error rate (BER) during data retention. In addition, PDA-LSTM do not need extra flag bits to record data transport of 3D NAND flash compared with WBVM, DVDS. The experiment results show that the PDA-LSTM reduces the average BER by 80.4% compared with strategy without data arrangement, and by 18.4%, 15.2% compared respectively with WBVM and DVDS with code-length 64.

Figures (16)

• Figure 1: Brief view of flash-based storage system and concept of this paper
• Figure 2: QLC 3D NAND flash and lateral charge migration
• Figure 3: Long-short term memory unit
• Figure 4: Arrangement example for data in four adjacent physics pages sharing the same bit lines.
• Figure 5: Assuming that there are four page data Data1, Data2, Data3, Data4 to be written, there are 24 placement strategies for these four data. Taking the data programming status of each bitline randomly selected as an example, (a) gives the comprehensive score of the cells on all bitlines in each placement method according to the LSM evaluation strategy, and selects the best data placement method as shown in (b).