VeriMoA: A Mixture-of-Agents Framework for Spec-to-HDL Generation

TL;DR

The paper tackles automated RTL-to-HDL generation by fighting two key limitations of large language models: sparse HDL-domain knowledge and noise propagation in multi-agent setups. It introduces VeriMoA, a training-free Mixture-of-Agents framework that combines a quality-guided global caching mechanism with multi-path generation using high-level intermediate representations in C++ and Python. This design yields monotonic quality improvement across layers and expanded solution spaces, enabling diverse and higher-quality HDL outputs without fine-tuning. Empirical results on VerilogEval 2.0 and RTLLM 2.0 show consistent Pass@1 gains of 15-30% across backbones, with smaller models matching or surpassing larger models and fine-tuned counterparts without training cost, highlighting the practical impact of quality-guided, diverse, non-training HDL synthesis.

Abstract

Automation of Register Transfer Level (RTL) design can help developers meet increasing computational demands. Large Language Models (LLMs) show promise for Hardware Description Language (HDL) generation, but face challenges due to limited parametric knowledge and domain-specific constraints. While prompt engineering and fine-tuning have limitations in knowledge coverage and training costs, multi-agent architectures offer a training-free paradigm to enhance reasoning through collaborative generation. However, current multi-agent approaches suffer from two critical deficiencies: susceptibility to noise propagation and constrained reasoning space exploration. We propose VeriMoA, a training-free mixture-of-agents (MoA) framework with two synergistic innovations. First, a quality-guided caching mechanism to maintain all intermediate HDL outputs and enables quality-based ranking and selection across the entire generation process, encouraging knowledge accumulation over layers of reasoning. Second, a multi-path generation strategy that leverages C++ and Python as intermediate representations, decomposing specification-to-HDL translation into two-stage processes that exploit LLM fluency in high-resource languages while promoting solution diversity. Comprehensive experiments on VerilogEval 2.0 and RTLLM 2.0 benchmarks demonstrate that VeriMoA achieves 15--30% improvements in Pass@1 across diverse LLM backbones, especially enabling smaller models to match larger models and fine-tuned alternatives without requiring costly training.

Figures (4)

• Figure 1: Overview of VeriMoA. The framework employs L layers with M agents per layer, featuring three agent types (Base, C++, Python) that generate HDL through different paths. A global cache stores all intermediate outputs with quality scores, enabling quality-guided selection across layers. Agents at each layer receive top-n quality HDL codes from all previous layers, ensuring monotonic improvement. The final aggregator synthesizes high-quality candidates into the output.
• Figure 2: Ablation Study of techniques adopted in our framework. Pass@1 performance [Higher is Better] reported on VerilogEval 2.0 dataset.
• Figure 3: VeriMoA performance (Pass@1)[Darker is Better] on VerilogEval 2.0 using Qwen2.5:7b with varying layer configurations.
• Figure 4: Quality and diversity metrics during LIFObuffer generation from RTLLM 2.0 across 10 trials.