Characterization of heat transfer in 3D CMOS structures using Sideband Scanning Thermal Wave Microscopy
Valentin Fonck, Mohammadali Razeghi, Jean Spièce, Phillip Dobson, Jonathan Weaver, George Ridgard, Grayson M. Noah, Pascal Gehring
TL;DR
This work tackles nanoscale heat transport in deeply buried CMOS BEOL structures under cryogenic operating conditions by introducing Sideband Scanning Thermal Wave Microscopy (S-STWM). The method modulates a buried heater at $f_{\mathrm{mod}}$ and senses with a high-frequency probe at $f_{\mathrm{car}}$, extracting sidebands at $f_{\mathrm{car}}\pm f_{\mathrm{mod}}$ to obtain phase information about heat propagation. By analyzing phase delays with a semi-infinite-wave model, the authors extract effective thermal diffusivity $\alpha$ and, with estimates of heat flux $Q_0$, effective thermal conductivity $\kappa$ across a CMOS BEOL structure containing a buried DTSCR heater in a 22-nm FDSOI process. The results reveal frequency- and geometry-dependent heat transport, including routing-dominated conduction along metal paths and insulator-dominated regions, and establish a foundation for in situ cryogenic thermal characterization and predictive 3D thermal modeling of cryo-CMOS devices. This technique offers a pathway to improved thermal management and packaging for quantum and HPC hardware by enabling quantitative, noninvasive mapping of heat flow in complex multilayer CMOS architectures.
Abstract
Efficient thermal management is critical for cryogenic CMOS circuits, where local heating can compromise device performance and qubit coherence. Understanding heat flow at the nanoscale in these multilayer architectures requires localized, high-resolution thermal probing techniques capable of accessing buried structures. Here, we introduce a sideband thermal wave detection scheme for Scanning Thermal Microscopy, S-STWM, to probe deeply buried heater structures within CMOS dies. By extracting the phase of propagating thermal waves, this method provides spatially resolved insight into heat dissipation pathways through complex multilayer structures. Our approach enables quantitative evaluation of thermal management strategies, informs the design of cryo-CMOS circuits, and establishes a foundation for in situ thermal characterization under cryogenic operating conditions.
