StrikeWatch: Wrist-worn Gait Recognition with Compact Time-series Models on Low-power FPGAs

TL;DR

StrikeWatch tackles real-time gait recognition on wrist-worn devices by de risking edge intelligence through a software-hardware co-design. It evaluates four compact time-series models (1D-CNN, 1D-SepCNN, LSTM, Transformer) and optimizes them for low-power FPGA inference, demonstrated on two platforms (AMD Spartan-7 XC7S15 and Lattice iCE40UP5K) with a real-world outdoor dataset from 12 participants. Key findings show that 1D-SepCNN offers the best balance between accuracy and energy, enabling up to 13.6 days of continuous operation on a single 320 mAh battery, while Transformer and LSTM offer higher capacity at greater energy cost. The work provides a deployable pipeline, hardware-aware quantization, and public data/code, underscoring the practicality of on-device gait feedback for running correction in outdoor, connectivity-challenged scenarios.

Abstract

Running offers substantial health benefits, but improper gait patterns can lead to injuries, particularly without expert feedback. While prior gait analysis systems based on cameras, insoles, or body-mounted sensors have demonstrated effectiveness, they are often bulky and limited to offline, post-run analysis. Wrist-worn wearables offer a more practical and non-intrusive alternative, yet enabling real-time gait recognition on such devices remains challenging due to noisy Inertial Measurement Unit (IMU) signals, limited computing resources, and dependence on cloud connectivity. This paper introduces StrikeWatch, a compact wrist-worn system that performs entirely on-device, real-time gait recognition using IMU signals. As a case study, we target the detection of heel versus forefoot strikes to enable runners to self-correct harmful gait patterns through visual and auditory feedback during running. We propose four compact DL architectures (1D-CNN, 1D-SepCNN, LSTM, and Transformer) and optimize them for energy-efficient inference on two representative embedded Field-Programmable Gate Arrays (FPGAs): the AMD Spartan-7 XC7S15 and the Lattice iCE40UP5K. Using our custom-built hardware prototype, we collect a labeled dataset from outdoor running sessions and evaluate all models via a fully automated deployment pipeline. Our results reveal clear trade-offs between model complexity and hardware efficiency. Evaluated across 12 participants, 6-bit quantized 1D-SepCNN achieves the highest average F1 score of 0.847 while consuming just 0.350 μJ per inference with a latency of 0.140 ms on the iCE40UP5K running at 20 MHz. This configuration supports up to 13.6 days of continuous inference on a 320 mAh battery. All datasets and code are available in the GitHub repository https://github.com/tianheng-ling/StrikeWatch.

Figures (7)

• Figure 1: Heel striking
• Figure 2: Forefoot striking
• Figure 4: StrikeWatch hardware and schematic diagram
• Figure 5: Example of forefoot (left) and heel (right) strikes, captured from a participant during outdoor data collection.
• Figure 6: Sample triaxial wrist-worn acceleration signals for forefoot (left) and heel (right) strike instances.