Virtual Gates Enabled by Digital Surrogate of Quantum Dot Devices

TL;DR

The paper tackles slow and intricate tuning of spin-qubit devices defined by electrostatic quantum dots, introducing a modular graph-based simulator that acts as a digital surrogate. A slow physics component, notably the self-consistent electrostatics, is accelerated by a neural surrogate within a directed-acyclic-graph framework, achieving end-to-end speedups of about $O(10^2)$ and node-level speedups near $O(10^3)$. It demonstrates construction of virtual gates by inverting the full crosstalk matrix $\boldsymbol{C}$, improving cross-gate orthogonality and validating the approach against a Ge/SiGe double-dot device with charge sensing. The framework enables efficient design, characterization, and control of complex semiconductor quantum-dot devices and is extensible to incorporate spin dynamics and time-dependent control for scalable quantum technologies.

Abstract

Advances in quantum technologies are often limited by slow device characterization, complex tuning requirements, and scalability challenges. Spin qubits in electrostatically defined quantum dots provide a promising platform but are not exempt from these limitations. Simulations enhance our understanding of such devices, and in many cases, rapid feedback between measurements and simulations can guide the development of optimal design and control strategies. Here, we introduce a modular, graph-based simulator that acts as a digital surrogate for a semiconductor quantum dot device, where computationally expensive processes are accelerated using deep learning. We demonstrate its potential by estimating crosstalk effects between gate electrodes and applying these estimates to construct virtual gates in a quantum dot device. We validate our approach through comparison with experiments on a double quantum dot defined in a Ge/SiGe heterostructure. We envision that this simulation framework will advance semiconductor-based quantum technologies by enabling more efficient design, characterization, and control of complex devices.

Figures (9)

• Figure 1: (a) SEM image (880x750 nm) of a device architecture similar to that modeled with the simulator; referred to as the experimental device (its design is shown in Fig. \ref{['fig:experimental_device_gate_design']}). (b-g) Sub-results produced by the graph-based simulator. (b) Applied gate voltages. (c) Initial electrostatic potential arising from gate voltages, surface potentials, and random disorder. (d) Self-consistent potential obtained through iterative solutions of the electric field generated by the 2DHG charge density. The color intensity (yellow) indicates potential magnitude. The iterative solver (red) can be replaced by a trained deep learning model (blue) to accelerate computations. With the self-consistent potential, we compute subsequent quantities, including (e) the charge transport semi-classical trajectory (yellow path), (f) quantum dot formation (yellow blobs), and (g) dot charge occupancy (yellow intensity).
• Figure 2: (a) Schematic of a double quantum dot confinement potential controlled by five gate electrodes. The potential energy is indicated in blue and Fermi reservoirs in red. The shade of yellow in the gate electrode labels indicates the relative voltage strength. As an illustration of crosstalk effects, the lighter blue potential exemplifies how varying gate electrode voltage $P_3$ also shifts the electrochemical potential of the nearest dot and the interdot barrier. (d) Varying the virtual gate $P'_3$ produces a more localized effect. (b–c, e–f) Charge-sensor current for the device configured as a double quantum dot defined with plunger gates $P_3$ and $P_4$. Experimental data are shown in (c,f), and simulated data from the surrogate in (b,e), taken in the same gate voltage region. The stability diagrams are generated by sweeping $P_3$ and $P_4$ (b–c) or by applying the virtual gates $P'_3$ and $P'_4$ estimated with the simulator (e–f). In (e–f), the charge-transition lines are closer to orthogonal than in (b–c), indicating that the virtual gates enable independent control of the dot electrochemical potentials. The virtual gate voltages estimated with the simulator also work well when applied to the real device, leaving only minimal residual crosstalk. Compared with the real device, the surrogate displays a higher addition energy, evidenced by fewer charge transitions, particularly for the dot adjacent to $P_3$. Possible sources of discrepancy include the breakdown of semiclassical approximations at low charge occupation, spin-filling effects, and presence of trapped carriers. In both the surrogate (e) and experimental device (f), the virtual gate sweeps include the charge sensor plunger, which maintains high readout contrast in the sensing signal.
• Figure 3: Observed changes in dot electrochemical potentials ($\Delta \mu_i$) and barrier tunnel couplings ($\Delta \tau_i$) normalized by the diagonal form the crosstalk matrix $\boldsymbol{C}$ as in Eq. \ref{['eq:virtual_gates']}. Each non-white pixel represents the quantity $\log_{10}{|{\boldsymbol{C}-\boldsymbol{I}}|}$ calculated from the crosstalk matrix $\boldsymbol{C}$, estimated from the surrogate while sweeping non virtualized (a) and virtualized gate voltages (b). The virtual gates used in (b) are derived by inverting the crosstalk matrix in (a). (b) Highlights how the surrogate compensation parameters effectively mitigate cross-talk in controlling dot electrochemical potentials and tunnel barriers.
• Figure 4: Schematic showing how configuration information (such as the device schematic in Fig. \ref{['fig:experimental_device_gate_design']}) is distributed to the graph. The system configuration is needed for each node, and node configurations are specific to a given node.
• Figure 5: Gate electrode design of the device used to configure the surrogate device gates.