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Neural-HAR: A Dimension-Gated CNN Accelerator for Real-Time Radar Human Activity Recognition

Yizhuo Wu, Francesco Fioranelli, Chang Gao

TL;DR

The paper tackles the challenge of real-time radar-based HAR on resource-constrained edge devices. It proposes Neural-HAR with GateCNN, a dimension-gated CNN that uses Doppler vector embedding and dual-path gating to capture complementary temporal and Doppler cues with a compact model. On the UoG2020 dataset GateCNN achieves 86.4% accuracy with 2.7k parameters and 0.28M FLOPs per inference, and an FPGA-based prototype on a Zynq Z-7007S achieves 107.5 μs latency and 15 mW dynamic power while storing weights in LUT-based ROM. This work demonstrates practical, real-time radar HAR at the edge and provides a scalable path toward ultra-low-power embedded sensing.

Abstract

Radar-based human activity recognition (HAR) is attractive for unobtrusive and privacy-preserving monitoring, yet many CNN/RNN solutions remain too heavy for edge deployment, and even lightweight ViT/SSM variants often exceed practical compute and memory budgets. We introduce Neural-HAR, a dimension-gated CNN accelerator tailored for real-time radar HAR on resource-constrained platforms. At its core is GateCNN, a parameter-efficient Doppler-temporal network that (i) embeds Doppler vectors to emphasize frequency evolution over time and (ii) applies dual-path gated convolutions that modulate Doppler-aware content features with temporal gates, complemented by a residual path for stable training. On the University of Glasgow UoG2020 continuous radar dataset, GateCNN attains 86.4% accuracy with only 2.7k parameters and 0.28M FLOPs per inference, comparable to CNN-BiGRU at a fraction of the complexity. Our FPGA prototype on Xilinx Zynq-7000 Z-7007S reaches 107.5 $μ$s latency and 15 mW dynamic power using LUT-based ROM and distributed RAM only (zero DSP/BRAM), demonstrating real-time, energy-efficient edge inference. Code and HLS conversion scripts are available at https://github.com/lab-emi/AIRHAR.

Neural-HAR: A Dimension-Gated CNN Accelerator for Real-Time Radar Human Activity Recognition

TL;DR

The paper tackles the challenge of real-time radar-based HAR on resource-constrained edge devices. It proposes Neural-HAR with GateCNN, a dimension-gated CNN that uses Doppler vector embedding and dual-path gating to capture complementary temporal and Doppler cues with a compact model. On the UoG2020 dataset GateCNN achieves 86.4% accuracy with 2.7k parameters and 0.28M FLOPs per inference, and an FPGA-based prototype on a Zynq Z-7007S achieves 107.5 μs latency and 15 mW dynamic power while storing weights in LUT-based ROM. This work demonstrates practical, real-time radar HAR at the edge and provides a scalable path toward ultra-low-power embedded sensing.

Abstract

Radar-based human activity recognition (HAR) is attractive for unobtrusive and privacy-preserving monitoring, yet many CNN/RNN solutions remain too heavy for edge deployment, and even lightweight ViT/SSM variants often exceed practical compute and memory budgets. We introduce Neural-HAR, a dimension-gated CNN accelerator tailored for real-time radar HAR on resource-constrained platforms. At its core is GateCNN, a parameter-efficient Doppler-temporal network that (i) embeds Doppler vectors to emphasize frequency evolution over time and (ii) applies dual-path gated convolutions that modulate Doppler-aware content features with temporal gates, complemented by a residual path for stable training. On the University of Glasgow UoG2020 continuous radar dataset, GateCNN attains 86.4% accuracy with only 2.7k parameters and 0.28M FLOPs per inference, comparable to CNN-BiGRU at a fraction of the complexity. Our FPGA prototype on Xilinx Zynq-7000 Z-7007S reaches 107.5 s latency and 15 mW dynamic power using LUT-based ROM and distributed RAM only (zero DSP/BRAM), demonstrating real-time, energy-efficient edge inference. Code and HLS conversion scripts are available at https://github.com/lab-emi/AIRHAR.
Paper Structure (9 sections, 6 equations, 3 figures, 2 tables)

This paper contains 9 sections, 6 equations, 3 figures, 2 tables.

Table of Contents

  1. Introduction
  2. Proposed GateCNN
  3. Gated Convolutions
  4. High-Level Synthesis Design
  5. Experimental Results
  6. Dataset and Experimental Setup
  7. Comparison with Previous Works
  8. FPGA Implementation
  9. Conclusion

Figures (3)

  • Figure 1: Hardware-oriented efficient GateCNN model for radar-based human activity recognition (HAR).
  • Figure 2: Architecture of the proposed GateCNN to process radar micro-Doppler signatures, i.e., 2D time-frequency maps of the target’s radial velocity over time (Doppler/velocity vs. time). The temporal path produces a gate, while the Doppler path extracts content features; the gate modulates Doppler-aware features, and a residual keeps gradient flow.
  • Figure 3: Proposed FPGA-based HAR System Design with HLS-based HAR Accelerator