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Accelerating Electrostatics-based Global Placement with Enhanced FFT Computation

Hangyu Zhang, Sachin S. Sapatnekar

TL;DR

This work addresses the FFT bottleneck in electrostatics-based global placement for large VLSI designs by introducing AccFFT, a coarse-to-fine FFT framework that separates long-range and short-range interactions. Long-range effects are computed on a coarse grid via PCFFT, while short-range corrections are handled by localized fine-grid FFTs, greatly reducing computational cost without sacrificing accuracy. The methods are integrated into Acc-ePlace and Acc-Pplace (and compatible with GPU frameworks like DREAMPlace), achieving up to 5.78× FFT speedups and around 32% total runtime reductions with minor or no degradation in wirelength on ISPD benchmarks. This yields scalable, high-quality placement suitable for modern, large-scale designs and GPU-accelerated workflows.

Abstract

Global placement is essential for high-quality and efficient circuit placement for complex modern VLSI designs. Recent advancements, such as electrostatics-based analytic placement, have improved scalability and solution quality. This work demonstrates that using an accelerated FFT technique, AccFFT, for electric field computation significantly reduces runtime. Experimental results on standard benchmarks show significant improvements when incorporated into the ePlace-MS and Pplace-MS algorithms, e.g., a 5.78x speedup in FFT computation and a 32% total runtime improvement against ePlace-MS, with 1.0% reduction of scaled half-perimeter wirelength after detailed placement.

Accelerating Electrostatics-based Global Placement with Enhanced FFT Computation

TL;DR

This work addresses the FFT bottleneck in electrostatics-based global placement for large VLSI designs by introducing AccFFT, a coarse-to-fine FFT framework that separates long-range and short-range interactions. Long-range effects are computed on a coarse grid via PCFFT, while short-range corrections are handled by localized fine-grid FFTs, greatly reducing computational cost without sacrificing accuracy. The methods are integrated into Acc-ePlace and Acc-Pplace (and compatible with GPU frameworks like DREAMPlace), achieving up to 5.78× FFT speedups and around 32% total runtime reductions with minor or no degradation in wirelength on ISPD benchmarks. This yields scalable, high-quality placement suitable for modern, large-scale designs and GPU-accelerated workflows.

Abstract

Global placement is essential for high-quality and efficient circuit placement for complex modern VLSI designs. Recent advancements, such as electrostatics-based analytic placement, have improved scalability and solution quality. This work demonstrates that using an accelerated FFT technique, AccFFT, for electric field computation significantly reduces runtime. Experimental results on standard benchmarks show significant improvements when incorporated into the ePlace-MS and Pplace-MS algorithms, e.g., a 5.78x speedup in FFT computation and a 32% total runtime improvement against ePlace-MS, with 1.0% reduction of scaled half-perimeter wirelength after detailed placement.
Paper Structure (11 sections, 16 equations, 4 figures, 3 tables, 1 algorithm)

This paper contains 11 sections, 16 equations, 4 figures, 3 tables, 1 algorithm.

Table of Contents

  1. Introduction
  2. Placement using Electrostatic Spreading Forces
  3. Preliminaries
  4. Overview of our approach for accelerating ePlace and Pplace
  5. Comparison of FFT computations with ePlace-MS and Pplace
  6. Accelerating FFT Computations using a Coarse Grid
  7. Overview
  8. Computing long-range interactions
  9. Novel Methods for Computing Short-Range Interactions
  10. Experimental Results
  11. Conclusion

Figures (4)

  • Figure 1: Long-short interactions: the red rectangular blocks represent cells. The blue grids mean that the cells in these grids have short-range interactions, while the yellow grids mean that the cells in these grids have long-range interactions with the cells in blue grids.
  • Figure 2: An illustration of 4:1 coarsening, where one $8 \times 8$ region from the original fine grid is converted to four $4 \times 4$ regions. (a) Four separate 16-point FFTs are used to compute short-range interactions on each of these four regions. (b) An example showing how inaccuracies in the pink cells, which lie at the border of the four regions in (a), are resolved by computing short-range interactions within a new $4 \times 4$ region. (c) The full set of $4 \times 4$ subregions required to cover the border regions of (a).
  • Figure 3: The comparison of different coarsening ratios with running time and quality. (a) With coarsening at a ratio of 4:1, the runtime achieves a speedup of $\mathbf{2.64\times}$. (b) At a coarsening ratio of 16:1, the runtime speedup increases to $\mathbf{5.94\times}$. (c) With coarsening at 64:1, the runtime speedup reaches $\mathbf{9.68\times}$. The cells cluster more at larger coarsening ratios.
  • Figure 4: Iso-runtime snapshots of placement at three specific times between a placer using a traditional FFT (top) vs. our Acc-ePlace approach (bottom). Standard cells are shown as red points, macros as blue rectangles, and filler cells as green points. In the time that it takes the traditional FFT-based placer to complete (a) 100, (b) 200, and (c) 400 iterations, the Acc-ePlace placer performs more iterations, as shown in the table in (d), resulting in a larger amount of cell spreading. This leads to faster convergence of the placer, where convergence is achieved when all density constraints are satisfied.