Loop Charges and Fragmentation in Pairwise Difference Conserving Circuits

TL;DR

The paper introduces pairwise-difference-conserving (PDC) circuits, a broad framework for constructing local gates on graphs that preserve pairwise differences of single-site observables. This constraint yields an extensive family of loop charges, forming abelian, 1-form-like symmetries that fragment the Hilbert space into many dynamically disconnected sectors. Focusing on a ladder geometry, the authors show a complete sector classification and demonstrate strong fragmentation, as well as nonergodic dynamics within the largest sector, including ETH violations and persistent revivals for certain product states. The results establish PDC circuits as a robust platform to study symmetry-induced fragmentation and nonergodicity in both quantum and classical settings, with potential links to integrability, topological memory, and higher-dimensional generalizations.

Abstract

In this work, we introduce a broad class of circuits, or quantum cellular automata, which we call 'pairwise-difference-conserving circuits' (PDC). These models are characterized by local gates that preserve the pairwise difference of local operators (e.g. particle number). Such circuits can be de- fined on arbitrary graphs in arbitrary dimensions for both quantum and classical degrees of freedom. A key consequence of the PDC construction is the emergence of an extensive set of loop charges associated with closed walks of even length on the graph. These charges exhibit a one-dimensional character reminiscent of 1-form symmetries and lead to strong Hilbert-space fragmentation. As a case study, we analyze a quasi one-dimensional ladder geometry, where we characterize all dynam- ically disconnected sectors by the loop-charge symmetries, providing a complete decomposition of the Hilbert space. For the ladder geometry, we observe clear signatures of nonergodic dynamics even within the largest symmetry sector.

Figures (11)

• Figure 1: Example of a Circuit constructed on a graph. Vertices of a graph illustrated as red squares correspond to PDC gates of the form \ref{['eq:PDC_gate']}, while qubits (black circles) live on the edges. With the blue loop $\gamma = (1,2,3,4)$ one can associate a charge $M_{\gamma}$, see Eq.(\ref{['charge-path']}), that is conserved.
• Figure 2: The sum of charges $M_{\gamma_1}$+$M_{\gamma_2}$ that are defined on the blue $\gamma_1 = (1,7,5,6)$ and the red $\gamma_2 = (3,4,7,2)$ loops is the same as $M_{\gamma_3}$ for a merged orange loop $\gamma_3 = \gamma_1 + \gamma_2$. Pluses and minuses indicate with which signs each spin contributes to the charge, Eq.(\ref{['charge-path']}).
• Figure 3: 2D square $4 \times 4$ lattice constructed from circuit PDC gates. We show a sample plaquette charge (purple) and both topological loops (blue). The full set of plaquettes together with the two non-contractible loops form a basis of loop symmetries (\ref{['charge-path']}).
• Figure 4: Circuit with ladder geometry of length $L=4$.
• Figure 5: Two dynamically decoupled islands, $I_1$ and $I_2$, separated by plaquettes with $M_k = \pm 4$.