Simple logical quantum computation with concatenated symplectic double codes

TL;DR

The paper introduces concatenated symplectic double (CSD) codes, built by applying a ZX-duality-informed concatenation of a non-CSS seed code $C$ with the inner $C_4$ code, yielding a CSS code $C_4 \otimes_\tau \mathfrak{D}(C)$ with favorable transversal properties. By adding an injected logical $S$ gate and leveraging a ZX-duality $\tau$, the authors show how a wide set of logical Clifford operations become SWAP-transversal on the concatenated code, enabling a simple, hardware-friendly circuit structure for Clifford computation on a single codeblock. They provide concrete instances (e.g., $[[16,4,4]]$) with large SWAP-transversal gate sets and discuss compilation, state preparation, and quantum error correction strategies tailored to CSD codes, including potential for a full Clifford group via gate injections and measurement-based protocols. Numerical simulations demonstrate promising circuit-level performance for state preparation and memory under realistic noise, indicating these codes could be strong candidates for medium-to-large quantum computers, especially where qubit movement and relabeling are inexpensive. The work also outlines open questions on seed-code selection, decoding, state preparation optimization, and efficient Clifford compilation.

Abstract

There have been significant recent advances in constructing theoretical and practical quantum error correcting codes that function well as quantum memories; however, performing fault-tolerant logical gates on these codes is less studied, and the protocols that do exist often require significant complexity. Building off the symplectic double construction, we investigate concatenated symplectic double codes, which have a rich set of logical gates implementable using only physical single-qubit gates and qubit relabeling. Combined with an injected logical phase gate, the full Clifford group on a single codeblock is achieved through a functionally simple circuit. We perform circuit-level simulations of state preparation and quantum error correction on these codes and show that they have promising performance at near state-of-the-art physical error rates. As such, we argue that concatenated symplectic double codes are strong contenders as the underlying computational code on medium- to large-scale quantum computers.

Figures (10)

• Figure 1: Schematic diagram of constructing a CSD code. A symplectic double code $\mathfrak{D}(C)$ is obtained by taking the symplectic double cover of a non-CSS code $C$, Eq. \ref{['eq:pcm_double']}. The concatenated symplectic double code $C_4 \otimes \mathfrak{D}(C)$ is then obtained by taking pairs of physical qubits of $\mathfrak{D}(C)$ related through the ZX-duality $\tau$ and encoding them as the logical qubits in the same $C_4$ codeblock. Figure adapted from Fig. 1 of Ref. burton2024.
• Figure 2: Using $\mathfrak{D}'$ to lift physical operations on $C$ to physical operations on $\mathfrak{D}(C)$. Only CNOT-type logical gates are obtainable through this lifting process.
• Figure 3: An example physical circuit implementing the $\overline{S}_\tau$, permutation, and $\overline{H}_\tau$ (left to right) gates. The entire circuit can be "untangled" and compressed to a layer of single-qubit Clifford gates, $U_1 \otimes ...\otimes U_{4n}$, $U_i \in \mathcal{C}_1$.
• Figure 4: (a) State preparation procedure for CSD codes. Concatenated generators are measured in such a way that hook errors propagate to single qubit errors on several $C_4$ code blocks. Measuring the opposite-type $C_4$ generator informs whether a hook error has occurred. (b) Circuit to fault-tolerantly measure both the $XXXX$ and $ZZZZ$ stabilizers simultaneously by using 'flagcillas' from Ref. Reichardt_2020. Hook errors propagate to the data qubits but are then caught by the opposite type stabilizer measurement. (c) Circuit to fault-tolerantly measure the $XXXX$ stabilizer of a $C_4$ block using a single additional flag qubit prepared in the $\ket{0}$ state. (d) Circuit to fault-tolerantly measure the $ZZZZ$ stabilizer of a $C_4$ block using a single additional flag qubit prepared in the $\ket{+}$ state. These two circuits were adapted from Ref. paetznick2024.
• Figure 5: (a) Acceptance probability of preparing $\ket{\overline{0}}$ for several CSD codes using the state preparation procedure of Section \ref{['sec:zx_prep']}. A prepped state is accepted if the deterministic checks all yield +1 measurement results and the opposite-type checks are consistent each time they are measured. (b) Resulting logical error rate per logical qubit, $\epsilon_L$ of the accepted states.

Theorems & Definitions (11)

• Theorem 2.1: Theorem 3.2 of burton2024
• Lemma 2.2
• proof
• Theorem 3.1
• proof
• Theorem 3.2
• proof
• Theorem 3.3: Theorem 4 of Grassl_2013
• Theorem 3.4: Corollary IX.8 of malcolm2025
• Corollary 3.5