Proof-Carrying Fair Ordering: Asymmetric Verification for BFT via Incremental Graphs

TL;DR

This work addresses MEV-like exploitation in BFT transaction ordering by introducing AUTIG, a proof-carrying, asymmetric fairness service. The leader maintains a persistent Unconfirmed Transaction Incremental Graph (UTIG) and emits compact proofs with each proposal, while followers statelessly audit proposals using these proofs, removing the need to re-run the entire ordering computation. Key contributions include incremental UTIG maintenance, a four-stage overlapping pipeline, a propose-and-prove proof design with frontier completeness, and a rigorous security/liveness analysis plus empirical evaluation showing higher throughput and lower latency than prior symmetric approaches. The approach enables scalable, fair ordering in distributed ledgers by separating heavy stateful processing from lightweight verification, with practical impact on DeFi applications and MEV mitigation. The work also opens directions for proof compression, adaptive pruning, dynamic membership, and cross-shard ordering to further improve practicality and resilience.

Abstract

Byzantine Fault-Tolerant (BFT) consensus protocols ensure agreement on transaction ordering despite malicious actors, but unconstrained ordering power enables sophisticated value extraction attacks like front running and sandwich attacks - a critical threat to blockchain systems. Order-fair consensus curbs adversarial value extraction by constraining how leaders may order transactions. While state-of-the-art protocols such as Themis attain strong guarantees through graph-based ordering, they ask every replica to re-run the leader's expensive ordering computation for validation - an inherently symmetric and redundant paradigm. We present AUTIG, a high-performance, pluggable order-fairness service that breaks this symmetry. Our key insight is that verifying a fair order does not require re-computing it. Instead, verification can be reduced to a stateless audit of succinct, verifiable assertions about the ordering graph's properties. AUTIG realizes this via an asymmetric architecture: the leader maintains a persistent Unconfirmed-Transaction Incremental Graph (UTIG) to amortize graph construction across rounds and emits a structured proof of fairness with each proposal; followers validate the proof without maintaining historical state. AUTIG introduces three critical innovations: (i) incremental graph maintenance driven by threshold-crossing events and state changes; (ii) a decoupled pipeline that overlaps leader-side collection/update/extraction with follower-side stateless verification; and (iii) a proof design covering all internal pairs in the finalized prefix plus a frontier completeness check to rule out hidden external dependencies. We implement AUTIG and evaluate it against symmetric graph-based baselines under partial synchrony. Experiments show higher throughput and lower end-to-end latency while preserving gamma-batch-order-fairness.

Figures (4)

• Figure 1: Execution-flow comparison of fair ordering engines.
• Figure 2: Overview of the AUTIG architecture. Panels. (a) Leader (stateful ordering) that maintains the UTIG and executes the pipeline; (b) Replicas (stateless verification)—clients first submit transactions to replicas, which then send $n\!-\!f$ signed LocalOrders to the leader; (c) the overlapped four–stage pipeline timeline; (d) the corresponding UTIG evolution for this batch. Workflow. The leader maintains a persistent UTIG across rounds and executes a four-stage pipeline: ① Collect $n-f$$LocalOrders$ and add their transactions as Pending nodes; ② Incrementally update supports to classify states ($a,b,c$ become Solid; $d,f,e$ remain Shaded), accumulate weights $W \leftarrow W_{\text{prev}}+W_{\text{batch}}$, and re-orient only affected edges; ③ Extract & Order by running Tarjan/condensation on the non-blank subgraph and selecting the last SCC with a Solid node as the anchor, yielding a finalizable prefix; ④ Prove & Broadcast by attaching state and edge-weight proofs, enabling stateless verification at replicas.
• Figure 3: TPS and latency of AUTIG and Themis under varying $lo-size$ and $tx-rate$.
• Figure 4: TPS and latency of AUTIG and Themis under varying $lo-interval$.

Theorems & Definitions (16)

• Theorem 1: Soundness and Completeness of Stateless Verification
• Lemma 2: Proof-Induced Graph Equivalence
• proof : Proof of Theorem \ref{['thm:verif_sc']}
• Theorem 3: Liveness with Explicit Bounds
• proof : Sketch
• Theorem 4: Pruning Safety and Live-Core Preservation
• Theorem 5: Recovery Soundness and Convergence with Byzantine Replies
• Theorem 6: Incremental Equivalence and Pipeline Linearizability
• Lemma 7: Correctness of Incremental Edge Updates
• proof