Quantum Circuit for Quantum Fourier Transform for Arbitrary Qubit Connectivity Graphs
Kamil Khadiev, Aliya Khadieva, Vadim Sagitov, Kamil Khasanov
TL;DR
This work develops a generic methodology to implement the Quantum Fourier Transform on quantum devices with arbitrary qubit connectivity graphs, by formulating and solving a graph-theoretic problem that guides qubit routing. The core tool is the NP-hard (3,2,1)-Covering Path problem, for which a dynamic-programming exact solution and a fast approximate approach are provided; these inform cascaded QFT circuits that minimize two-qubit gate usage. The resulting circuit family has a CNOT cost bounded between $n^2-2n-2$ and $2n^2-2n-2$, with $LNN$ yields around $1.5n^2$ and specialized graphs like sun architectures achieving costs comparable to graph-specific designs. Overall, the method offers a practical, scalable pathway to deploy QFT on diverse hardware, matching or surpassing existing graph-specific techniques while enabling arbitrary connectivity, and it remains open to further improvement for LNN and hardware validation.
Abstract
In the paper, we consider quantum circuits for the Quantum Fourier Transform (QFT) algorithm. The QFT algorithm is a very popular technique used in many quantum algorithms. We present a generic method for constructing quantum circuits for this algorithm implementing on quantum devices with restrictions. Many quantum devices (for example, based on superconductors) have restrictions on applying two-qubit gates. These restrictions are presented by a qubit connectivity graph. Typically, researchers consider only the linear nearest neighbor (LNN) architecture of the qubit connection, but current devices have more complex graphs. We present a method for arbitrary connected graphs that minimizes the number of CNOT gates in the circuit for implementing on such architecture. We compare quantum circuits built by our algorithm with existing quantum circuits optimized for specific graphs that are Linear-nearest-neighbor (LNN) architecture, ``sun'' (a cycle with tails, presented by the 16-qubit IBMQ device) and ``two joint suns'' (two joint cycles with tails, presented by the 27-qubit IBMQ device). Our generic method gives similar results with existing optimized circuits for ``sun'' and ``two joint suns'' architectures, and a circuit with slightly more CNOT gates for the LNN architecture. At the same time, our method allows us to construct a circuit for arbitrary connected graphs.