Serial Polar Automorphism Ensemble Decoders for Physical Unclonable Functions
Marvin Rübenacke, Sebastian Cammerer, Michael Sullivan, Alexander Keller
TL;DR
The paper tackles the challenge of reliable key extraction from physical unclonable functions (PUFs) under high raw bit error rates by proposing a serial Automorphism Ensemble Decoder (AED) for Polar codes. It reuses a single successive cancellation (SC) decoder across multiple decoding attempts and introduces cascaded and recursive interleavers to scale AED candidates with minimal hardware, aided by aggressive 3-bit quantization. The approach achieves the same block error rate of $10^{-6}$ as a BCH baseline while using $1.75\times$ fewer codeword bits for $K=312$, translating into reduced helper data and chip area, and it extends naturally to biased PUFs with debiasing. Overall, the work demonstrates a practical, area-efficient, soft-decision-capable coding scheme for PUFs that preserves reliability in ultra-low-rate regimes.
Abstract
Physical unclonable functions (PUFs) involve challenging practical applications of error-correcting codes (ECCs), requiring extremely low failure rates on the order of $10^{-6}$ and below despite raw input bit error rates as high as 22%. These requirements call for an efficient ultra-low rate code design. In this work, we propose a novel coding scheme tailored for PUFs based on Polar codes and a low-complexity version of automorphism ensemble decoding (AED). Notably, our serial AED scheme reuses a single successive cancellation (SC) decoder across multiple decoding attempts. By introducing cascaded and recursive interleavers, we efficiently scale the number of AED candidates without requiring expensive large multiplexers. An aggressive quantization strategy of only 3 bits per message further reduces the area requirements of the underlying SC decoder. The resulting coding scheme achieves the same block error rate of $10^{-6}$ as our baseline based on Bose-Ray-Chaudhuri-Hocquenghem (BCH) codes while requiring 1.75x fewer codeword bits to encode the same K = 312 payload bits. This reduction translates directly into 1.75x less helper data storage and, consequently, a smaller overall chip area.
