Development of Deep Neural Network First-Level Hardware Track Trigger for the Belle II Experiment

TL;DR

Belle II faces escalating L1 trigger rates from beam backgrounds as luminosity rises. The authors implement a DNN-based first-level CDC track trigger on an FPGA with a simplified self-attention mechanism to robustly extract $z_0$ and $\theta_0$ from drift-time features and hit patterns in Track Segments. Compared with the prior MLP-based trigger, the DNN approach reduces the track trigger rate by about 37% and improves signal efficiency for $p_T>0.3$ GeV from $96\%$ to $98\%$, while achieving better background suppression and stable parameter resolutions. This work represents the first hardware-trigger deployment of an attention-based DNN in collider experiments and supports Belle II’s operation at higher luminosities.

Abstract

The Belle II experiment at the SuperKEKB accelerator is designed to explore physics beyond the Standard Model with unprecedented luminosity. As the beam intensity increased, the experiment faced significant challenges due to higher beam-induced background, leading to a high trigger rate and placing limitations on further luminosity increases. To address this problem, we developed trigger logic for tracking using deep neural network (DNN) technology on an FPGA for the Belle II hardware trigger system, employing high-level synthesis techniques. By leveraging drift time and hit pattern information from the Central Drift Chamber and incorporating a simplified self-attention architecture, the DNN track trigger significantly improves track reconstruction performance at the hardware level. Compared to the existing neural track trigger, our implementation reduces the total track trigger rate by 37% while improving average efficiency for the signal tracks from 96% to 98% for charged tracks with transverse momentum > 0.3 GeV. This upgrade ensures the long-term viability of the Belle II data acquisition system as luminosity continues to increase.

Figures (11)

• Figure 1: Schematic view of the CDC cross section in the $r$-$\phi$ plane. Light gray dots correspond to axial sense wires, and dark gray dots are stereo sense wires. Every 8 or 6 layers of axial or stereo wires make a Super layer (SL). Orange dots correspond to the wires with hits. The magnified section shows the Track Segments built using specific patterns of hit wires. The track segments are the basic units for trigger logic.
• Figure 2: Schematic of the Belle II L1 CDC trigger system. It collects raw CDC hits from CDC FEE, builds Track Segments (TSs), determines the event time, and processes TSs to find 2D tracks and to fit 3D tracks.
• Figure 3: Examples of the standard Track Segments patterns. Each cell corresponds to one CDC wire. Green cells are the priority hit wires, and yellow cells are hit wires. Based on the hit pattern, we define passage direction for tracks.sara
• Figure 4: Schematic of charge track hits on the stereo and axial wire.
• Figure 5: Input variables of DNN track trigger from each TS, including $\phi_{rel}$, signed priority drift time $t^p_{drift}$ and cross angle $\alpha$ for the priority wire, and extra drift time $t^{i}_{drift}$ for extra wires.