Table of Contents
Fetching ...

Characterizing Superconducting Qubits using Averaged Circuit Eigenvalue Sampling

Tauno Palomaki, Shu Xin Wu, Noah Huffman, Samuel D. Park, James Shackford, Ben DalFavero, Leigh Norris, Ryan Sitler, Paraj Titum, Kevin Schultz

TL;DR

This work demonstrates ACES, a Pauli-noise-learning protocol, as a fast, scalable method to characterize a gate-set on superconducting qubits by reconstructing per-gate Pauli error rates through circuit-eigenvalue sampling. By applying Pauli twirling to both gates and measurements and solving a linear system via a Hadamard transform, the authors obtain detailed Pauli-noise models that yield gate-fidelity predictions in line with RB benchmarks, while simultaneously revealing the nature of dominant error channels. The experimental results on two coupled transmons show that ACES can identify and quantify injected coherent errors, suggesting its utility for monitoring slow drifts and guiding calibration in scalable devices. While effective, the method is subject to SPAM and time-variation limitations, motivating extensions to temporally correlated noise, leakage benchmarking, and mid-circuit measurements for broader quantum-error-correction applicability.

Abstract

Efficient characterization of noise during quantum gate operations is an essential step to building and scaling up a quantum computer. One such protocol is averaged circuit eigenvalue sampling (ACES) which efficiently characterizes a noisy gate set by reconstructing a Pauli noise model for a each gate. Here we utilize the ACES protocol to characterize two coupled superconducting qubits. For accurate reconstruction, we tailor the noise via Pauli twirling and account for measurement errors. We verify the accuracy of the protocol by comparing the predicted gate fidelities to that extracted from conventional benchmarking approaches, such as interleaved randomized benchmarking. Furthermore, we demonstrate the efficacy of ACES in accurately identifying specific noise sources by reconstructing injected phase errors in the two-qubit gates.

Characterizing Superconducting Qubits using Averaged Circuit Eigenvalue Sampling

TL;DR

This work demonstrates ACES, a Pauli-noise-learning protocol, as a fast, scalable method to characterize a gate-set on superconducting qubits by reconstructing per-gate Pauli error rates through circuit-eigenvalue sampling. By applying Pauli twirling to both gates and measurements and solving a linear system via a Hadamard transform, the authors obtain detailed Pauli-noise models that yield gate-fidelity predictions in line with RB benchmarks, while simultaneously revealing the nature of dominant error channels. The experimental results on two coupled transmons show that ACES can identify and quantify injected coherent errors, suggesting its utility for monitoring slow drifts and guiding calibration in scalable devices. While effective, the method is subject to SPAM and time-variation limitations, motivating extensions to temporally correlated noise, leakage benchmarking, and mid-circuit measurements for broader quantum-error-correction applicability.

Abstract

Efficient characterization of noise during quantum gate operations is an essential step to building and scaling up a quantum computer. One such protocol is averaged circuit eigenvalue sampling (ACES) which efficiently characterizes a noisy gate set by reconstructing a Pauli noise model for a each gate. Here we utilize the ACES protocol to characterize two coupled superconducting qubits. For accurate reconstruction, we tailor the noise via Pauli twirling and account for measurement errors. We verify the accuracy of the protocol by comparing the predicted gate fidelities to that extracted from conventional benchmarking approaches, such as interleaved randomized benchmarking. Furthermore, we demonstrate the efficacy of ACES in accurately identifying specific noise sources by reconstructing injected phase errors in the two-qubit gates.

Paper Structure

This paper contains 19 sections, 20 equations, 10 figures, 1 table.

Figures (10)

  • Figure 1: Error model for a noisy Clifford gate (G), and noisy measurement ($\{\tilde{E}_j\}$). We model gate errors as occurring after the gate, and measurement errors before the gate.
  • Figure 2: Experimental details for the device used. (a) Schematic of the superconducting qubit device consisting of two transmons coupled via a tunable coupler. (b) Estimated parameters of the device components. These parameters include frequency ($f$) and anharmonicity ($\alpha$) of the two qubits ($\rm Q0$, $\rm Q1$) and the tunable coupler ($\rm TC$), and the transverse coupling ($g$) between each component pair.
  • Figure 3: Composite gates incorporating Pauli twirling (represented by Pauli gates $P_{a}$) and coherent error injection (represented by $R_z$ gate). (Top) Twirled CZ gate with an optional injected coherent rotation error along the $z$-axis with the rotation angle set at $\Delta \theta$. The Pauli gates $P_a$ and $P_b$ are randomly chosen for every CZ. (Bottom) Twirled measurement operation with a randomly chosen Pauli gate $P_a$, where the classical output bit is flipped when $P_a$ is $X$ or $Y$.
  • Figure 4: Experimental demonstration of G-twisted twirled $CZ$ gates and measurement twirling. (a) Circuit for benchmarking our twirled $CZ$. (b) Measured probability for 1 (black) and 11 (red) repeated $CZ$-gates subject to an injected coherent error. (c) Same as (b), but G-twisted twirling each $CZ$-gate. (d) Experimentally measured confusion matrix without measurement twirling and (e) with measurement twirling, 10,000 shots per prepared state.
  • Figure 5: Sample sequence representing a row of the design matrix. (a) Each row of the design matrix is specified by the tuple consisting of a circuit composed of gates drawn from the gate set, an input Pauli state $P_a$, and a corresponding output Pauli state $P_{a^{\prime}}$. (b) Full circuit corresponding to preparing the $-$ eigenstate of the input Pauli basis $P_a$, noisy circuit with noise elements as defined by the noise model, and output measurement basis specified by the output Pauli basis. (c) The elements of the design matrix $A$ for the row are specified by the conjugation of the input Pauli through the elementary gates composing the circuit, grouped by gate and Pauli here.
  • ...and 5 more figures