Combining Error Detection and Mitigation: A Hybrid Protocol for Near-Term Quantum Simulation

TL;DR

The paper tackles error suppression on NISQ devices by presenting a hybrid protocol that merges quantum error detection with quantum error mitigation, specifically integrating Pauli twirling, probabilistic error cancellation (PEC), and the $[[n, n-2, 2]]$ quantum error detecting code. It introduces partial twirling to reduce overhead, derives how to estimate and invert reduced logical noise after post-selection, and demonstrates the approach on a VQE circuit for the H$_2$ ground-state energy using both a simulator and IBM hardware. Key contributions include a detailed protocol for encoding/decoding with error detection, a mechanism to approximate and mitigate the remaining logical noise, and experimental validation showing improved accuracy and reduced sampling costs. The results suggest a viable path for applying near-term quantum chemistry and other quantum simulations on noisy devices, balancing error suppression with resource efficiency.

Abstract

Practical implementation of quantum error correction is currently limited by near-term quantum hardware. In contrast, quantum error mitigation has demonstrated strong promise for improving the performance of noisy quantum circuits without the requirement of full fault tolerance. In this work, we develop a hybrid error suppression protocol that integrates Pauli twirling, probabilistic error cancellation, and the $[[n, n-2, 2]]$ quantum error detecting code. In addition, to reduce overhead from error mitigation components of our method, we modify Pauli twirling by lowering the number of Pauli operators in the twirling set, and apply probabilistic error cancellation at the end of the encoded circuit to remove undetectable errors. Finally, we demonstrate our protocol on a non-Clifford variational quantum eigensolver circuit that estimates the ground state energy of $\rm H_2$ using both \texttt{qiskit} AerSimulator and the IBM quantum processor \texttt{ibm\_brussels}.

Figures (20)

• Figure 1: State preparation (left) and decoding (right) circuits for an arbitrary logical state. Note that these circuits are not fault-tolerant, but using them in this paper would not affect the main result.
• Figure 2: The $[[n, n-2, 2]]$ error detection protocol with PEC. Here $|\psi_0\rangle$ is the input logical state. This diagram include noisy state-preparation $\widetilde{\mathcal{E}}$, noisy unitary operation $\widetilde{\mathcal{U}}$ and noisy decoding $\widetilde{\mathcal{D}}$. It also displays the "location" of equivalent noise channel $\mathcal{N}_{\rm tot}$ and $\mathcal{N}_{\rm reduced}$.
• Figure 3: Sampling overhead of three error mitigation settings: PEC for layer noise, PEC for overall noise, and combined protocol with QEDC and PEC. The first two settings are evaluated on $4$-qubits circuit, while the third one is evaluated on $6$-qubits circuit encoded with QEDC.
• Figure 4: Pauli twirling conjugates a noisy channel $\tilde{U}$ by Pauli gates $\{P_i\}$, such that the average over conjugated channels becomes a stochastic Pauli channel. Averaging over twirled circuits converts the noise $\Lambda$, in $\Tilde{\mathcal{U}}$, into a depolarizing form which can be inverted using methods such as probabilistic error cancellation.
• Figure 5: Combination of Pauli twirling with quantum error correction (QEC). A logical state is encoded using $\mathcal{E}$, and evolved through the noisy unitary $\Tilde{\mathcal{U}}$. Twirling is implemented with operations $\mathcal{P}$ on either side of $\Tilde{\mathcal{U}}$, following which the QEC is applied. The system is decoded with $\mathcal{D}$.