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Runtime Energy Monitoring for RISC-V Soft-Cores

Alberto Scionti, Paolo Savio, Francesco Lubrano, Olivier Terzo, Marco Ferretti, Florin Apopei, Juri Bellucci, Ennio Spano, Luca Carriere

TL;DR

The work tackles the challenge of real-time energy monitoring for RISC-V soft-cores without relying on heavy micro-architectural models. It introduces a hardware-assisted runtime energy monitor built around a measurement board connected to an FPGA-based System-on-Module, capturing voltage and current via a shunt-based sensing network and exposing averaged values through memory-mapped registers. Energy is calculated by integrating power $P=V\cdot I$ over time, with timing governed by a minimum sample interval $t_s^{min}$ and an averaging window $T_{avg}= t_s^{min}\cdot K\cdot N$, enabling low-overhead, fine-grained power profiling. The framework is designed to scale to multi-node clusters and supports online telemetry through MQTT to central time-series databases, facilitating real-time visualization and offline analysis. This approach offers a practical path toward energy-aware design-space exploration for aeronautical surrogate workloads on RISC-V soft-cores, addressing the gap between detailed modeling and hardware-level measurement.

Abstract

Energy efficiency is one of the major concern in designing advanced computing infrastructures. From single nodes to large-scale systems (data centers), monitoring the energy consumption of the computing system when applications run is a critical task. Designers and application developers often rely on software tools and detailed architectural models to extract meaningful information and determine the system energy consumption. However, when a design space exploration is required, designers may incur in continuous tuning of the models to match with the system under evaluation. To overcome such limitations, we propose a holistic approach to monitor energy consumption at runtime without the need of running complex (micro-)architectural models. Our approach is based on a measurement board coupled with a FPGA-based System-on-Module. The measuring board captures currents and voltages (up to tens measuring points) driving the FPGA and exposes such values through a specific memory region. A running service reads and computes energy consumption statistics without consuming extra resources on the FPGA device. Our approach is also scalable to monitoring of multi-nodes infrastructures (clusters). We aim to leverage this framework to perform experiments in the context of an aeronautical design application; specifically, we will look at optimizing performance and energy consumption of a shallow artificial neural network on RISC-V based soft-cores.

Runtime Energy Monitoring for RISC-V Soft-Cores

TL;DR

The work tackles the challenge of real-time energy monitoring for RISC-V soft-cores without relying on heavy micro-architectural models. It introduces a hardware-assisted runtime energy monitor built around a measurement board connected to an FPGA-based System-on-Module, capturing voltage and current via a shunt-based sensing network and exposing averaged values through memory-mapped registers. Energy is calculated by integrating power over time, with timing governed by a minimum sample interval and an averaging window , enabling low-overhead, fine-grained power profiling. The framework is designed to scale to multi-node clusters and supports online telemetry through MQTT to central time-series databases, facilitating real-time visualization and offline analysis. This approach offers a practical path toward energy-aware design-space exploration for aeronautical surrogate workloads on RISC-V soft-cores, addressing the gap between detailed modeling and hardware-level measurement.

Abstract

Energy efficiency is one of the major concern in designing advanced computing infrastructures. From single nodes to large-scale systems (data centers), monitoring the energy consumption of the computing system when applications run is a critical task. Designers and application developers often rely on software tools and detailed architectural models to extract meaningful information and determine the system energy consumption. However, when a design space exploration is required, designers may incur in continuous tuning of the models to match with the system under evaluation. To overcome such limitations, we propose a holistic approach to monitor energy consumption at runtime without the need of running complex (micro-)architectural models. Our approach is based on a measurement board coupled with a FPGA-based System-on-Module. The measuring board captures currents and voltages (up to tens measuring points) driving the FPGA and exposes such values through a specific memory region. A running service reads and computes energy consumption statistics without consuming extra resources on the FPGA device. Our approach is also scalable to monitoring of multi-nodes infrastructures (clusters). We aim to leverage this framework to perform experiments in the context of an aeronautical design application; specifically, we will look at optimizing performance and energy consumption of a shallow artificial neural network on RISC-V based soft-cores.

Paper Structure

This paper contains 6 sections, 2 figures.

Figures (2)

  • Figure 1: Architectural view of the runtime energy monitor.
  • Figure 2: Measurement board extension for agnostic FPGA SoM support.