Quantum process tomography of a compressed time evolution circuit on superconducting quantum processors

TL;DR

This work investigates noise resilience in near-term quantum hardware by comparing compressed, variational circuits against standard Trotter decompositions for time evolution in small Heisenberg spin chains. It uses quantum process tomography, including full QPT for three qubits and selective QPT with Pauli twirling for four qubits, to reconstruct process matrices and analyze noise, finding that compressed circuits exhibit larger eigenvalue moduli and thus greater resilience under realistic hardware noise. The study demonstrates that hardware-aware, low-depth, variational circuit representations can achieve higher process fidelity than conventional methods at equivalent approximation error, with implications for extending the reach of NISQ-era quantum simulations. These results support the development of noise-mitigation strategies and variational process representations to enable longer-time quantum simulations on superconducting processors.

Abstract

As present day quantum hardware is limited by various noise mechanisms, quantum advantage can only be reached in the near-term by designing noise-resilient quantum algorithms. In this work, we employ state-of-the-art quantum process tomography (QPT) techniques to characterize the noise channels of IBM quantum processors under realistic runtime constraints. As our main application, we compare the Trotter time-evolution of three- and four-qubit wave functions to a compressed quantum circuit version of the same evolution operator. By analysing the spectral properties of the two process channels, we find that the compressed circuit systematically yields larger eigenvalue moduli, demonstrating better noise resilience.

Figures (11)

• Figure 1: Quantum circuit of the $1^{\mathrm{st}}$ order Trotter decomposition of the nearest-neighbor Heisenberg Hamiltonian with open boundary conditions. The qubits are arranged on a linear grid, consistent with the topology of the device on which the experiments are performed. The gray frame highlights a single Trotter step alternating nearest-neighbor terms acting on even and odd bonds, which is repeated to achieve the desired time evolution.
• Figure 2: (a) Quantum circuit of the $1^{\mathrm{st}}$ order Trotter decomposition with periodic boundary conditions, in which the gate $U^{}_{2}$ couples the first and last qubit. (b) On a device implementing only nearest neighbor gates on a linear topology, a set of swap gates has to be implemented to connect the two distant qubits.
• Figure 3: Decomposition of a general unitary gate into single qubit and CNOT gates.
• Figure 4: Compressed quantum circuit constructed in a brickwork structure. Each gate in the approximated shallow circuit corresponding to the $m=1$ shaded area is parametrized by a 12-dimensional vector $\vec{\theta}$ (see text) in order to approximate $U(t)$. The compressed circuit can be repeated to reach later times, which are multiples of the approximated time evolution operator, $U(mt)$. The depth of the compressed circuit is counted by its number of brickwall layers $n$.
• Figure 5: Left: Approximation error $\epsilon$ as written in Eq. \ref{['eq::infidelity']} for the $2^{\mathrm{nd}}$ order Trotter and compressed approximations of the exact unitary evolution at time $t=1$. The number of cnots is estimated from the individual decomposition of each two-qubit gate in the considered circuit, and no further optimization than presented in the main text is considered at this level. Right: Approximation error of the $1^{\mathrm{st}}$ and $2^{\mathrm{nd}}$ order Trotter decompositions, and of the compressed circuit in presence of periodic boundary conditions.