Measuring pulse heating in Si quantum dots with individual two-level fluctuators

TL;DR

Pulse heating in silicon quantum-dot spin qubits is investigated using individual charged two-level fluctuators as local thermometers. The approach monitors TLFs with rf reflectometry while applying gate pulses to quantify how heat shifts qubit-related parameters; heating increases with pulse amplitude and frequency and depends on the idling voltages, with electron accumulation near gates implicated. The study shows that heating is largely nonlocal and not determined by the distance to the pulsed gate, and suggests gate-area minimization or reconfiguration as mitigation. It also highlights TLFs as a potential tool for local thermometry in semiconductor quantum-dot devices.

Abstract

To encode quantum information in semiconductor spin qubits, voltage pulses are necessary for initialization, gate operation, and readout. However, these pulses dissipate heat, shifting spin-qubit frequencies and reducing gate fidelities. The cause of this pulse heating in quantum-dot devices is unknown. Here, we measure pulse heating using charged two-level fluctuators (TLFs) in Si/SiGe quantum dots. Specifically, we observe that voltage pulses on nearby gates tend to increase TLF switching rates and occupation biases. The amount of heating depends on the pulse amplitude and frequency, but not on the distance between the pulsed gates and the TLFs. The amount of heating also generally depends on the idling voltage of the pulsed gates, suggesting that electrons accumulated under or near the gates contribute to the heating. We hypothesize that reducing the area of the gates with electrons nearby could mitigate the heating.

Figures (4)

• Figure 1: Experimental setup.a Gate pattern for Device 1. The upper right quantum dot is used as a charge sensor to measure the TLF. Plunger gates, tunneling gates, accumulation gates, and screening gates are sketched in red, blue, green, and black, respectively. The black scale bar is $200~nm$. The lower main-side channel circled by a purple box is closed by screening gates S and SQ. Voltage pulses are applied through the middle screening gate S and seven finger gates on the lower main side via bias tees. All the pulse amplitudes reported in this work are at the device level after attenuators and bias tees (see Ref. ejcthesis for further details about the experimental setup). Electrons are occupied under the gate-stack fanout regions when idling gate voltages are above the accumulation threshold. In the fanout regions, the total area that each finger gate overlaps the quantum well is about $3,300~\mu m^2$. b Examples of TLF time traces at mixing chamber temperatures of $40~mK$ and $150~mK$. The two subplots share a common $x$-axis. The horizontal red dashed lines represent the mean values associated with the "0" and "1" states. c TLF switching time and occupation bias vs. mixing chamber temperature $T_\text{MC}$. The switching times $\tau=t_\text{max}/0.946$ are extracted from the Allan variance of the time series ye2024characterization, where $t_\text{max}$ is the time lag where the Allan variance has a peak. The occupation biases $B$ are computed by fitting the signal histogram to the sum of two Gaussians with the same variance, and the error bars are calculated from the $95\%$ confidence bounds of the fit parameters. The reduced sensor sensitivity above $100~mK$ due to thermal broadening of the transport peak causes a large overlap of the two Gaussians, which could introduce errors in the estimated occupation bias at elevated temperatures.
• Figure 2: Measurement scheme for pulse heating.a The sensor dot measures the TLF, which is heated up by voltage pulses. b Pulse sequence. We pulse the gate to generate heating and then send an rf excitation to the sensor dot for readout. The total pulse sequence, consisting of the excitation and readout segments, lasts for $20~\mu s$. c Example time traces with different pulse configurations. The voltage pulse on the P1 gate has amplitude $10~mV$ and frequency $2~MHz$.
• Figure 3: Amplitude, frequency, and voltage dependence of heating from the P1 gate.a Switching time and temperature ratio vs. pulse amplitude with $f=2~MHz$. b Switching time and temperature ratio vs. pulse frequency with $A=5~mV$. In a and b, $V_\text{P1}=0.6~V$ is above the electron accumulation threshold of $0.4~V$. c Temperature ratio vs. P1 gate idling voltage with a $10~mV$ and $2~MHz$ pulse applied to the P1 gate. The vertical dashed line denotes the electron accumulation threshold voltage at $0.4~V$. d and e Amplitude and frequency dependence with idling voltage at $0.3~V$ below the threshold of $0.4~V$.
• Figure 4: Heating caused by pulsing the middle screening gate S.a Example time-series without (top) and with (bottom) a pulse applied to the S gate with $A=30~mV$ and $f=2~MHz$. b Switching time and temperature ratio vs. pulse amplitude with $f=2~MHz$. c Switching time and temperature ratio vs. pulse frequency with $A=30~mV$.