IM-PIR: In-Memory Private Information Retrieval

TL;DR

This paper tackles the memory bottleneck in private information retrieval (PIR) by proposing IM-PIR, a processing-in-memory (PIM) solution for multi-server PIR on UPMEM DPUs. The design offloads memory-bound linear operations (dpXOR) to DPUs while keeping DPF key evaluation on the host CPU, enabling in-place database processing and reduced data movement. Empirical results on a real PIM system show IM-PIR delivering up to 3.7× higher query throughput and notable latency reductions compared with processor-centric baselines, including GPU-based approaches. The work demonstrates the practicality and value of PIM for privacy-preserving dataaccess workloads and establishes IM-PIR as a first-of-its-kind PIM-based multi-server PIR architecture with strong performance gains.

Abstract

Private information retrieval (PIR) is a cryptographic primitive that allows a client to securely query one or multiple servers without revealing their specific interests. In spite of their strong security guarantees, current PIR constructions are computationally costly. Specifically, most PIR implementations are memory-bound due to the need to scan extensive databases (in the order of GB), making them inherently constrained by the limited memory bandwidth in traditional processor-centric computing architectures. Processing-in-memory (PIM) is an emerging computing paradigm that augments memory with compute capabilities, addressing the memory bandwidth bottleneck while simultaneously providing extensive parallelism. Recent research has demonstrated PIM's potential to significantly improve performance across a range of data-intensive workloads, including graph processing, genome analysis, and machine learning. In this work, we propose the first PIM-based architecture for multi-server PIR. We discuss the algorithmic foundations of the latter and show how its operations align with the core strengths of PIM architectures: extensive parallelism and high memory bandwidth. Based on this observation, we design and implement IM-PIR, a PIM-based multi-server PIR approach on top of UPMEM PIM, the first openly commercialized PIM architecture. Our evaluation demonstrates that a PIM-based multi-server PIR implementation significantly improves query throughput by more than 3.7x when compared to a standard CPU-based PIR approach.

Figures (12)

• Figure 1: Single-server PIR with fully homomorphic encryption. To fetch record 7 from a 4-entry database $D=[2,6,7,5]$, the client homomorphically encrypts a one-hot query vector into a query ciphertext which is sent to the database server. The server first homomorphically multiplies the query ciphertext with the entire DB, and then homomorphically adds the resulting ciphertexts to obtain $\mathsf{Enc}(7)$. This is sent back to the client who decrypts it to obtain the record of interest, 7, obliviously.
• Figure 2: Multi-server PIR with $n=2$ non-colluding servers. To fetch record $10$ from the replicated database $[00, 10, 01, 11]$, the client generates (random) bit vectors which XOR to 1 only at index of interest ($2$ in this case). The servers XOR elements of the database where the bit vectors have value 1. The results are sent to the client which obtains the desired item by XORing both results: $01\oplus 11 = 10$.
• Figure 3: Breakdown of execution times for DPF-based multi-server PIR operations. Memory-bound (low operational intensity) XOR-based operations represent the primary bottleneck, motivating the need for memory-centric compute solutions.
• Figure 4: High-level overview of the UPMEM PIM hardware architecture. The host CPU interacts with both standard main memory and PIM-enabled memory. The latter contains low-power DRAM processing units (DPUs), enabling computation in memory.
• Figure 5: Multi-server PIR with IM-PIR. Server-side computations are partitioned between the host CPU and PIM DPUs: the host performs initial DPF key evaluation, while the more costly memory-bound linear $\mathsf{dpXOR}$ operations are performed on PIM DPUs.